Message ID | 20171205132600.13796-4-dev@g0hl1n.net |
---|---|
State | Changes Requested, archived |
Delegated to: | David Miller |
Headers | show |
Series | net: fec: fix refclk enable for SMSC LAN8710/20 | expand |
On Tue, Dec 05, 2017 at 02:25:59PM +0100, Richard Leitner wrote: > From: Richard Leitner <richard.leitner@skidata.com> > > The Microchip/SMSC LAN8710/LAN8720 PHYs need (according to their > datasheet [1]) a continuous REF_CLK when configured to "REF_CLK In Mode". > Therefore set the PHY_RST_AFTER_CLK_EN flag for those PHYs to let the > ETH driver reset them after the REF_CLK is enabled. > > [1] http://ww1.microchip.com/downloads/en/DeviceDoc/00002165B.pdf > > Signed-off-by: Richard Leitner <richard.leitner@skidata.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Andrew
diff --git a/drivers/net/phy/smsc.c b/drivers/net/phy/smsc.c index a1961ba87e2b..be399d645224 100644 --- a/drivers/net/phy/smsc.c +++ b/drivers/net/phy/smsc.c @@ -312,7 +312,7 @@ static struct phy_driver smsc_phy_driver[] = { .name = "SMSC LAN8710/LAN8720", .features = PHY_BASIC_FEATURES, - .flags = PHY_HAS_INTERRUPT, + .flags = PHY_HAS_INTERRUPT | PHY_RST_AFTER_CLK_EN, .probe = smsc_phy_probe,