Patchwork [44/58] pxa2xx_dma: make req array static

login
register
mail settings
Submitter Juan Quintela
Date Feb. 24, 2011, 5:57 p.m.
Message ID <0873cfec0c9618ae4e032e9f0dc44c9419e7bcdb.1298569508.git.quintela@redhat.com>
Download mbox | patch
Permalink /patch/84453/
State New
Headers show

Comments

Juan Quintela - Feb. 24, 2011, 5:57 p.m.
We know its size, and it is always allocated

Signed-off-by: Juan Quintela <quintela@redhat.com>
---
 hw/pxa2xx_dma.c |    7 +++----
 1 files changed, 3 insertions(+), 4 deletions(-)

Patch

diff --git a/hw/pxa2xx_dma.c b/hw/pxa2xx_dma.c
index b512d34..6fd2282 100644
--- a/hw/pxa2xx_dma.c
+++ b/hw/pxa2xx_dma.c
@@ -23,6 +23,8 @@  typedef struct {
 /* Allow the DMA to be used as a PIC.  */
 typedef void (*pxa2xx_dma_handler_t)(void *opaque, int irq, int level);

+#define PXA2XX_DMA_NUM_REQUESTS 75
+
 struct PXA2xxDMAState {
     pxa2xx_dma_handler_t handler;
     qemu_irq irq;
@@ -39,7 +41,7 @@  struct PXA2xxDMAState {
     int channels;
     PXA2xxDMAChannel *chan;

-    uint8_t *req;
+    uint8_t req[PXA2XX_DMA_NUM_REQUESTS];

     /* Flag to avoid recursive DMA invocations.  */
     int running;
@@ -48,8 +50,6 @@  struct PXA2xxDMAState {
 #define PXA255_DMA_NUM_CHANNELS	16
 #define PXA27X_DMA_NUM_CHANNELS	32

-#define PXA2XX_DMA_NUM_REQUESTS	75
-
 #define DCSR0	0x0000	/* DMA Control / Status register for Channel 0 */
 #define DCSR31	0x007c	/* DMA Control / Status register for Channel 31 */
 #define DALGN	0x00a0	/* DMA Alignment register */
@@ -495,7 +495,6 @@  static PXA2xxDMAState *pxa2xx_dma_init(target_phys_addr_t base,
     s->chan = qemu_mallocz(sizeof(PXA2xxDMAChannel) * s->channels);
     s->irq = irq;
     s->handler = (pxa2xx_dma_handler_t) pxa2xx_dma_request;
-    s->req = qemu_mallocz(sizeof(uint8_t) * PXA2XX_DMA_NUM_REQUESTS);

     memset(s->chan, 0, sizeof(PXA2xxDMAChannel) * s->channels);
     for (i = 0; i < s->channels; i ++)