[U-Boot] ARM: omap3_logic: Enable NAND unlocking during Falcon mode

Message ID 1512431690-7774-1-git-send-email-aford173@gmail.com
State Under Review
Delegated to: Tom Rini
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  • [U-Boot] ARM: omap3_logic: Enable NAND unlocking during Falcon mode
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Commit Message

Adam Ford Dec. 4, 2017, 11:54 p.m.
Falcon mode was already working with SD card.  This enables the
unlocking of NAND to allow the NAND read & write.  This also
expands the README file based on the am335x describing how to
setup Falcon mode.

Signed-off-by: Adam Ford <aford173@gmail.com>

Comments

Tom Rini Dec. 13, 2017, 10:56 p.m. | #1
On Mon, Dec 04, 2017 at 05:54:50PM -0600, Adam Ford wrote:

> Falcon mode was already working with SD card.  This enables the
> unlocking of NAND to allow the NAND read & write.  This also
> expands the README file based on the am335x describing how to
> setup Falcon mode.
> 
> Signed-off-by: Adam Ford <aford173@gmail.com>
> 
> diff --git a/board/logicpd/omap3som/README b/board/logicpd/omap3som/README
> index 06b3998..b77b3d6 100644

Applied to u-boot/master, thanks!

Patch

diff --git a/board/logicpd/omap3som/README b/board/logicpd/omap3som/README
index 06b3998..b77b3d6 100644
--- a/board/logicpd/omap3som/README
+++ b/board/logicpd/omap3som/README
@@ -17,3 +17,46 @@  This step is optional, but should you want to change the default to the SOM-LV,
   make distclean
   make omap3_logic_defconfig
 
+Falcon Mode: FAT SD cards
+=========================
+
+In this case the additional file is written to the filesystem.  In this
+example we assume that the uImage and device tree to be used are already on
+the FAT filesystem (only the uImage MUST be for this to function
+afterwards) along with a Falcon Mode aware MLO and the FAT partition has
+already been created and marked bootable:
+
+U-Boot # mmc rescan
+# Load kernel and device tree into memory, perform export
+U-Boot # fatload mmc 0 ${loadaddr} uImage
+U-Boot # run loadfdt
+U-Boot # setenv optargs quiet
+U-Boot # run mmcargs
+U-Boot # run common_bootargs
+U-Boot # spl export fdt ${loadaddr} - ${fdtaddr}
+
+This will print a number of lines and then end with something like:
+   Loading Device Tree to 8dec9000, end 8dee0295 ... OK
+
+So then note the starting address and write the args to mmc/sd:
+
+U-Boot # fatwrite mmc 0:1 0x8dec9000 args 0x20000
+
+The size of 0x20000 matches the CMD_SPL_WRITE_SIZE.
+
+Falcon Mode: NAND
+=================
+
+In this case the additional data is written to another partition of the
+NAND.  In this example we assume that the uImage and device tree to be are
+already located on the NAND somewhere (such as filesystem or mtd partition)
+along with a Falcon Mode aware MLO written to the correct locations for
+booting and mtdparts have been configured correctly for the board:
+
+U-Boot # nand read ${loadaddr} kernel
+U-Boot # load nand rootfs ${fdtaddr} /boot/am335x-evm.dtb
+U-Boot # run nandargs
+U-Boot # run common_bootargs
+U-Boot # spl export fdt ${loadaddr} - ${fdtaddr}
+U-Boot # nand erase.part u-boot-spl-os
+U-Boot # nand write ${fdtaddr} u-boot-spl-os
diff --git a/board/logicpd/omap3som/omap3logic.c b/board/logicpd/omap3som/omap3logic.c
index 4935a49..fc8a8f2 100644
--- a/board/logicpd/omap3som/omap3logic.c
+++ b/board/logicpd/omap3som/omap3logic.c
@@ -114,6 +114,47 @@  void get_board_mem_timings(struct board_sdrc_timings *timings)
 	timings->ctrlb = MICRON_V_ACTIMB_200;
 	timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
 }
+
+#define GPMC_NAND_COMMAND_0 (OMAP34XX_GPMC_BASE + 0x7c)
+#define GPMC_NAND_DATA_0 (OMAP34XX_GPMC_BASE + 0x84)
+#define GPMC_NAND_ADDRESS_0 (OMAP34XX_GPMC_BASE + 0x80)
+
+void spl_board_prepare_for_linux(void)
+{
+	/* The Micron NAND starts locked which
+	 * prohibits mounting the NAND as RW
+	 * The following commands are what unlocks
+	 * the NAND to become RW Falcon Mode does not
+	 * have as many smarts as U-Boot, but Logic PD
+	 * only makes NAND with 512MB so these hard coded
+	 * values should work for all current models
+	 */
+
+	writeb(0x70, GPMC_NAND_COMMAND_0);
+	writeb(-1, GPMC_NAND_DATA_0);
+	writeb(0x7a, GPMC_NAND_COMMAND_0);
+	writeb(0x00, GPMC_NAND_ADDRESS_0);
+	writeb(0x00, GPMC_NAND_ADDRESS_0);
+	writeb(0x00, GPMC_NAND_ADDRESS_0);
+	writeb(-1, GPMC_NAND_COMMAND_0);
+
+	/* Begin address 0 */
+	writeb(NAND_CMD_UNLOCK1, 0x6e00007c);
+	writeb(0x00, GPMC_NAND_ADDRESS_0);
+	writeb(0x00, GPMC_NAND_ADDRESS_0);
+	writeb(0x00, GPMC_NAND_ADDRESS_0);
+	writeb(-1, GPMC_NAND_DATA_0);
+
+	/* Ending address at the end of Flash */
+	writeb(NAND_CMD_UNLOCK2, GPMC_NAND_COMMAND_0);
+	writeb(0xc0, GPMC_NAND_ADDRESS_0);
+	writeb(0xff, GPMC_NAND_ADDRESS_0);
+	writeb(0x03, GPMC_NAND_ADDRESS_0);
+	writeb(-1, GPMC_NAND_DATA_0);
+	writeb(0x79, GPMC_NAND_COMMAND_0);
+	writeb(-1, GPMC_NAND_DATA_0);
+	writeb(-1, GPMC_NAND_DATA_0);
+}
 #endif
 
 #ifdef CONFIG_USB_MUSB_OMAP2PLUS