diff mbox series

[v1,for-2.12,4/5] s390x/tcg: indicate value of TODPR in STCKE

Message ID 20171204125505.29203-5-david@redhat.com
State New
Headers show
Series s390x/tcg: CCW hotplug support | expand

Commit Message

David Hildenbrand Dec. 4, 2017, 12:55 p.m. UTC
We were not yet using the value of the TOD Programmable Register.

Signed-off-by: David Hildenbrand <david@redhat.com>
---
 target/s390x/translate.c | 5 +++++
 1 file changed, 5 insertions(+)

Comments

Thomas Huth Dec. 6, 2017, 3:24 p.m. UTC | #1
On 04.12.2017 13:55, David Hildenbrand wrote:
> We were not yet using the value of the TOD Programmable Register.
> 
> Signed-off-by: David Hildenbrand <david@redhat.com>
> ---
>  target/s390x/translate.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/target/s390x/translate.c b/target/s390x/translate.c
> index 48b031894a..8da8610839 100644
> --- a/target/s390x/translate.c
> +++ b/target/s390x/translate.c
> @@ -3897,7 +3897,10 @@ static ExitStatus op_stcke(DisasContext *s, DisasOps *o)
>  {
>      TCGv_i64 c1 = tcg_temp_new_i64();
>      TCGv_i64 c2 = tcg_temp_new_i64();
> +    TCGv_i64 todpr = tcg_temp_new_i64();
>      gen_helper_stck(c1, cpu_env);
> +    /* 16 bit value store in an uint32_t (only valid bits set) */
> +    tcg_gen_ld32u_i64(todpr, cpu_env, offsetof(CPUS390XState, todpr));
>      /* Shift the 64-bit value into its place as a zero-extended
>         104-bit value.  Note that "bit positions 64-103 are always
>         non-zero so that they compare differently to STCK"; we set
> @@ -3905,11 +3908,13 @@ static ExitStatus op_stcke(DisasContext *s, DisasOps *o)
>      tcg_gen_shli_i64(c2, c1, 56);
>      tcg_gen_shri_i64(c1, c1, 8);
>      tcg_gen_ori_i64(c2, c2, 0x10000);
> +    tcg_gen_or_i64(c2, c2, todpr);
>      tcg_gen_qemu_st64(c1, o->in2, get_mem_index(s));
>      tcg_gen_addi_i64(o->in2, o->in2, 8);
>      tcg_gen_qemu_st64(c2, o->in2, get_mem_index(s));
>      tcg_temp_free_i64(c1);
>      tcg_temp_free_i64(c2);
> +    tcg_temp_free_i64(todpr);
>      /* ??? We don't implement clock states.  */
>      gen_op_movi_cc(s, 0);
>      return NO_EXIT;
> 

IANATE (I am not a TCG expert), but as far as I can see, this seems to
be correct.

Reviewed-by: Thomas Huth <thuth@redhat.com>
diff mbox series

Patch

diff --git a/target/s390x/translate.c b/target/s390x/translate.c
index 48b031894a..8da8610839 100644
--- a/target/s390x/translate.c
+++ b/target/s390x/translate.c
@@ -3897,7 +3897,10 @@  static ExitStatus op_stcke(DisasContext *s, DisasOps *o)
 {
     TCGv_i64 c1 = tcg_temp_new_i64();
     TCGv_i64 c2 = tcg_temp_new_i64();
+    TCGv_i64 todpr = tcg_temp_new_i64();
     gen_helper_stck(c1, cpu_env);
+    /* 16 bit value store in an uint32_t (only valid bits set) */
+    tcg_gen_ld32u_i64(todpr, cpu_env, offsetof(CPUS390XState, todpr));
     /* Shift the 64-bit value into its place as a zero-extended
        104-bit value.  Note that "bit positions 64-103 are always
        non-zero so that they compare differently to STCK"; we set
@@ -3905,11 +3908,13 @@  static ExitStatus op_stcke(DisasContext *s, DisasOps *o)
     tcg_gen_shli_i64(c2, c1, 56);
     tcg_gen_shri_i64(c1, c1, 8);
     tcg_gen_ori_i64(c2, c2, 0x10000);
+    tcg_gen_or_i64(c2, c2, todpr);
     tcg_gen_qemu_st64(c1, o->in2, get_mem_index(s));
     tcg_gen_addi_i64(o->in2, o->in2, 8);
     tcg_gen_qemu_st64(c2, o->in2, get_mem_index(s));
     tcg_temp_free_i64(c1);
     tcg_temp_free_i64(c2);
+    tcg_temp_free_i64(todpr);
     /* ??? We don't implement clock states.  */
     gen_op_movi_cc(s, 0);
     return NO_EXIT;