diff mbox series

[U-Boot,V2,08/23] imx: cpu: update cpu file to support i.MX8M

Message ID 20171204043136.17167-9-peng.fan@nxp.com
State Changes Requested
Delegated to: Stefano Babic
Headers show
Series imx: add i.MX8M support and i.MX8MQ EVK | expand

Commit Message

Peng Fan Dec. 4, 2017, 4:31 a.m. UTC
Update get_reset_cause to reflect i.MX8M
Compile out get_ahb_clk and set_chipselect_size for i.MX8M

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm/mach-imx/cpu.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

Comments

Stefano Babic Dec. 7, 2017, 8:40 a.m. UTC | #1
On 04/12/2017 05:31, Peng Fan wrote:
> Update get_reset_cause to reflect i.MX8M
> Compile out get_ahb_clk and set_chipselect_size for i.MX8M
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  arch/arm/mach-imx/cpu.c | 11 ++++++++++-
>  1 file changed, 10 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c
> index 18205dc984..c811252733 100644
> --- a/arch/arm/mach-imx/cpu.c
> +++ b/arch/arm/mach-imx/cpu.c
> @@ -62,6 +62,11 @@ static char *get_reset_cause(void)
>  		return "WDOG4";
>  	case 0x00200:
>  		return "TEMPSENSE";
> +#elif defined(CONFIG_MX8M)
> +	case 0x00100:
> +		return "WDOG2";
> +	case 0x00200:
> +		return "TEMPSENSE";
>  #else
>  	case 0x00100:
>  		return "TEMPSENSE";
> @@ -137,6 +142,8 @@ unsigned imx_ddr_size(void)
>  const char *get_imx_type(u32 imxtype)
>  {
>  	switch (imxtype) {
> +	case MXC_CPU_MX8MQ:
> +		return "8MQ";	/* Quad-core version of the mx8m */
>  	case MXC_CPU_MX7S:
>  		return "7S";	/* Single-core version of the mx7 */
>  	case MXC_CPU_MX7D:
> @@ -259,7 +266,7 @@ int cpu_mmc_init(bd_t *bis)
>  }
>  #endif
>  
> -#ifndef CONFIG_MX7
> +#if !(defined(CONFIG_MX7) || defined(CONFIG_MX8M))
>  u32 get_ahb_clk(void)
>  {
>  	struct mxc_ccm_reg *imx_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
> @@ -293,6 +300,7 @@ void arch_preboot_os(void)
>  #endif
>  }
>  
> +#ifndef CONFIG_MX8M
>  void set_chipselect_size(int const cs_size)
>  {
>  	unsigned int reg;
> @@ -323,3 +331,4 @@ void set_chipselect_size(int const cs_size)
>  
>  	writel(reg, &iomuxc_regs->gpr[1]);
>  }
> +#endif
> 

Reviewed-by: Stefano Babic <sbabic@denx.de>

Best regards,
Stefano Babic
Fabio Estevam Dec. 16, 2017, 5:36 p.m. UTC | #2
On Mon, Dec 4, 2017 at 2:31 AM, Peng Fan <peng.fan@nxp.com> wrote:
> Update get_reset_cause to reflect i.MX8M
> Compile out get_ahb_clk and set_chipselect_size for i.MX8M
>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>

Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
diff mbox series

Patch

diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c
index 18205dc984..c811252733 100644
--- a/arch/arm/mach-imx/cpu.c
+++ b/arch/arm/mach-imx/cpu.c
@@ -62,6 +62,11 @@  static char *get_reset_cause(void)
 		return "WDOG4";
 	case 0x00200:
 		return "TEMPSENSE";
+#elif defined(CONFIG_MX8M)
+	case 0x00100:
+		return "WDOG2";
+	case 0x00200:
+		return "TEMPSENSE";
 #else
 	case 0x00100:
 		return "TEMPSENSE";
@@ -137,6 +142,8 @@  unsigned imx_ddr_size(void)
 const char *get_imx_type(u32 imxtype)
 {
 	switch (imxtype) {
+	case MXC_CPU_MX8MQ:
+		return "8MQ";	/* Quad-core version of the mx8m */
 	case MXC_CPU_MX7S:
 		return "7S";	/* Single-core version of the mx7 */
 	case MXC_CPU_MX7D:
@@ -259,7 +266,7 @@  int cpu_mmc_init(bd_t *bis)
 }
 #endif
 
-#ifndef CONFIG_MX7
+#if !(defined(CONFIG_MX7) || defined(CONFIG_MX8M))
 u32 get_ahb_clk(void)
 {
 	struct mxc_ccm_reg *imx_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
@@ -293,6 +300,7 @@  void arch_preboot_os(void)
 #endif
 }
 
+#ifndef CONFIG_MX8M
 void set_chipselect_size(int const cs_size)
 {
 	unsigned int reg;
@@ -323,3 +331,4 @@  void set_chipselect_size(int const cs_size)
 
 	writel(reg, &iomuxc_regs->gpr[1]);
 }
+#endif