Message ID | 20171130151041.15132-1-miquel.raynal@free-electrons.com |
---|---|
State | Changes Requested |
Delegated to: | Boris Brezillon |
Headers | show |
Series | mtd: nand: samsung: add datasheet minimum strength requirements for a chip | expand |
Hi Miquel, On Thu, 30 Nov 2017 16:10:41 +0100 Miquel Raynal <miquel.raynal@free-electrons.com> wrote: Why not naming the chip in the subject line? "mtd: nand: samsung: add ECC requirements for K9F4G08U0D" > Samsung NAND chip K9F4G08U0D minimum ECC strength requirement is 1 bit > per 512 bytes. As the chip is not ONFI nor JEDEC and because of the lack > of these values, boards using it failed to probe the NAND controller > driver. Fix this by adding the default values if needed. > > Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> > --- > drivers/mtd/nand/nand_samsung.c | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/drivers/mtd/nand/nand_samsung.c b/drivers/mtd/nand/nand_samsung.c > index d348f0129ae7..5dc4fa4862d7 100644 > --- a/drivers/mtd/nand/nand_samsung.c > +++ b/drivers/mtd/nand/nand_samsung.c > @@ -91,6 +91,13 @@ static void samsung_nand_decode_id(struct nand_chip *chip) > } > } else { > nand_decode_ext_id(chip); > + > + /* Datasheet values for SLC Samsung K9F4G08U0D-S[I|C]B0(T00) */ > + if (nand_is_slc(chip) && chip->id.data[1] == 0xDC && > + (!chip->ecc_step_ds || !chip->ecc_strength_ds)) { Why do you test chip->ecc_step_ds and chip->ecc_strenght_ds values? I mean, the chip is not ONFI or JEDEC compliant, so there's no reason these fields would have been assigned to something != 0, and if they were, it's a bug. > + chip->ecc_step_ds = 512; > + chip->ecc_strength_ds = 1; > + } > } > } >
diff --git a/drivers/mtd/nand/nand_samsung.c b/drivers/mtd/nand/nand_samsung.c index d348f0129ae7..5dc4fa4862d7 100644 --- a/drivers/mtd/nand/nand_samsung.c +++ b/drivers/mtd/nand/nand_samsung.c @@ -91,6 +91,13 @@ static void samsung_nand_decode_id(struct nand_chip *chip) } } else { nand_decode_ext_id(chip); + + /* Datasheet values for SLC Samsung K9F4G08U0D-S[I|C]B0(T00) */ + if (nand_is_slc(chip) && chip->id.data[1] == 0xDC && + (!chip->ecc_step_ds || !chip->ecc_strength_ds)) { + chip->ecc_step_ds = 512; + chip->ecc_strength_ds = 1; + } } }
Samsung NAND chip K9F4G08U0D minimum ECC strength requirement is 1 bit per 512 bytes. As the chip is not ONFI nor JEDEC and because of the lack of these values, boards using it failed to probe the NAND controller driver. Fix this by adding the default values if needed. Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> --- drivers/mtd/nand/nand_samsung.c | 7 +++++++ 1 file changed, 7 insertions(+)