[V2,6/7] PCI: add device wait after slot and bus reset

Message ID 1511763628-11856-7-git-send-email-okaya@codeaurora.org
State New
Delegated to: Bjorn Helgaas
Headers show
Series
  • [V2,1/7] PCI: protect restore with device lock to be consistent
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Commit Message

Sinan Kaya Nov. 27, 2017, 6:20 a.m.
Rev 3.1 Sec 2.3.1 Request Handling Rules indicates that a device can issue
CRS following secondary bus reset. Handle device presence gracefully.

Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
---
 drivers/pci/pci.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Christoph Hellwig Nov. 29, 2017, 5:39 p.m. | #1
On Mon, Nov 27, 2017 at 01:20:27AM -0500, Sinan Kaya wrote:
> Rev 3.1 Sec 2.3.1 Request Handling Rules indicates that a device can issue
> CRS following secondary bus reset. Handle device presence gracefully.
> 
> Signed-off-by: Sinan Kaya <okaya@codeaurora.org>

Looks good,

Reviewed-by: Christoph Hellwig <hch@lst.de>

Patch

diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 0a9a696..8472c24 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -4035,7 +4035,7 @@  int pci_reset_bridge_secondary_bus(struct pci_dev *dev)
 {
 	pcibios_reset_secondary_bus(dev);
 
-	return 0;
+	return pci_dev_wait(dev, "bus reset", PCIE_RESET_READY_POLL_MS);
 }
 EXPORT_SYMBOL_GPL(pci_reset_bridge_secondary_bus);