From patchwork Thu Nov 23 19:04:59 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 840881 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3yjTLX2zqpz9s76 for ; Fri, 24 Nov 2017 06:05:56 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753259AbdKWTFz (ORCPT ); Thu, 23 Nov 2017 14:05:55 -0500 Received: from mga11.intel.com ([192.55.52.93]:33555 "EHLO mga11.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752948AbdKWTFz (ORCPT ); Thu, 23 Nov 2017 14:05:55 -0500 Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 23 Nov 2017 11:05:55 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.44,443,1505804400"; d="scan'208";a="1247734038" Received: from stinkbox.fi.intel.com (HELO stinkbox) ([10.237.72.174]) by fmsmga002.fm.intel.com with SMTP; 23 Nov 2017 11:05:52 -0800 Received: by stinkbox (sSMTP sendmail emulation); Thu, 23 Nov 2017 21:05:51 +0200 From: Ville Syrjala To: dri-devel@lists.freedesktop.org Cc: intel-gfx@lists.freedesktop.org, Laurent Pinchart , Thierry Reding , linux-tegra@vger.kernel.org Subject: [PATCH 12/15] drm/tegra/dc: Use drm_mode_get_hv_timing() to populate plane clip rectangle Date: Thu, 23 Nov 2017 21:04:59 +0200 Message-Id: <20171123190502.28449-13-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20171123190502.28449-1-ville.syrjala@linux.intel.com> References: <20171123190502.28449-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org From: Ville Syrjälä Use drm_mode_get_hv_timing() to fill out the plane clip rectangle. No functional changes as the code already uses crtc_state->mode to populate the clip, which is also what drm_mode_get_hv_timing() uses. Once everyone agrees on this we can move the clip handling into drm_atomic_helper_check_plane_state(). Cc: Laurent Pinchart Cc: Thierry Reding Cc: linux-tegra@vger.kernel.org Signed-off-by: Ville Syrjälä Acked-by: Thierry Reding --- drivers/gpu/drm/tegra/dc.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c index fc70351b9017..93b47e0e038b 100644 --- a/drivers/gpu/drm/tegra/dc.c +++ b/drivers/gpu/drm/tegra/dc.c @@ -477,7 +477,7 @@ static int tegra_plane_state_add(struct tegra_plane *plane, { struct drm_crtc_state *crtc_state; struct tegra_dc_state *tegra; - struct drm_rect clip; + struct drm_rect clip = {}; int err; /* Propagate errors from allocation or locking failures. */ @@ -485,10 +485,9 @@ static int tegra_plane_state_add(struct tegra_plane *plane, if (IS_ERR(crtc_state)) return PTR_ERR(crtc_state); - clip.x1 = 0; - clip.y1 = 0; - clip.x2 = crtc_state->mode.hdisplay; - clip.y2 = crtc_state->mode.vdisplay; + if (crtc_state->enable) + drm_mode_get_hv_timing(&crtc_state->mode, + &clip.x2, &clip.y2); /* Check plane state for visibility and calculate clipping bounds */ err = drm_atomic_helper_check_plane_state(state, crtc_state, &clip,