From patchwork Thu Nov 23 15:01:49 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cyrille Pitchen X-Patchwork-Id: 840832 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3yjPgv4XLrz9s72 for ; Fri, 24 Nov 2017 03:20:43 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752739AbdKWQUm (ORCPT ); Thu, 23 Nov 2017 11:20:42 -0500 Received: from 19.mo7.mail-out.ovh.net ([178.33.251.118]:33100 "EHLO 19.mo7.mail-out.ovh.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751956AbdKWQUm (ORCPT ); Thu, 23 Nov 2017 11:20:42 -0500 Received: from player762.ha.ovh.net (b6.ovh.net [213.186.33.56]) by mo7.mail-out.ovh.net (Postfix) with ESMTP id 796078157C for ; Thu, 23 Nov 2017 16:03:16 +0100 (CET) Received: from mountainer.wedev4u.int (cor13-1-82-232-94-13.fbx.proxad.net [82.232.94.13]) (Authenticated sender: cyrille.pitchen@wedev4u.fr) by player762.ha.ovh.net (Postfix) with ESMTPSA id 7B22FE0094; Thu, 23 Nov 2017 16:02:59 +0100 (CET) From: Cyrille Pitchen To: bhelgaas@google.com, kishon@ti.com, lorenzo.pieralisi@arm.com, linux-pci@vger.kernel.org Cc: adouglas@cadence.com, stelford@cadence.com, dgary@cadence.com, kgopi@cadence.com, eandrews@cadence.com, thomas.petazzoni@free-electrons.com, sureshp@cadence.com, nsekhar@ti.com, linux-kernel@vger.kernel.org, robh@kernel.org, devicetree@vger.kernel.org, Cyrille Pitchen Subject: [PATCH 4/5] dt-bindings: PCI: cadence: Add DT bindings for Cadence PCIe endpoint controller Date: Thu, 23 Nov 2017 16:01:49 +0100 Message-Id: <0a11e9742db04fd5b4bc08568b3ab5a056a0ef9d.1511439189.git.cyrille.pitchen@free-electrons.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: References: In-Reply-To: References: X-Ovh-Tracer-Id: 16371710547089446913 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: 25 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrgedttddrledtgdehudcutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfqggfjpdevjffgvefmvefgnecuuegrihhlohhuthemuceftddtnecuogfthfevqddqjfgurhdqufhushhpvggtthdqlhhoficuldehmdenogfthfevqddqjfgurhdqufhushhpvggtthculddvtddm Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org This patch documents the DT bindings for the Cadence PCIe controller when configured in endpoint mode. Signed-off-by: Cyrille Pitchen Acked-by: Rob Herring --- .../devicetree/bindings/pci/cdns,cdns-pcie-ep.txt | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.txt diff --git a/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.txt b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.txt new file mode 100644 index 000000000000..d4168d79cceb --- /dev/null +++ b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.txt @@ -0,0 +1,20 @@ +* Cadence PCIe endpoint controller + +Required properties: +- compatible: should contain "cdns,cdns-pcie-ep" to identify the IP used. +- reg: should contain the controller register base address and AXI interface + region base address respectively. +- reg-names: Must be "reg" and "mem" respectively. + +Optional properties: +- max-functions: maximum number of functions that can be configured. + +Example: + + pci@fc000000 { + compatible = "cdns,cdns-pcie-ep"; + reg = <0x0 0xfc000000 0x0 0x01000000>, /* Base Address */ + <0x0 0x80000000 0x0 0x40000000>; /* AXI region */ + reg-names = "reg", "mem"; + max-functions = /bits/ 8 <8>; + };