[4/5] dt-bindings: PCI: cadence: Add DT bindings for Cadence PCIe endpoint controller

Message ID 0a11e9742db04fd5b4bc08568b3ab5a056a0ef9d.1511439189.git.cyrille.pitchen@free-electrons.com
State New
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Series
  • PCI: Add support to the Cadence PCIe controller
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Commit Message

Cyrille Pitchen Nov. 23, 2017, 3:01 p.m.
This patch documents the DT bindings for the Cadence PCIe controller
when configured in endpoint mode.

Signed-off-by: Cyrille Pitchen <cyrille.pitchen@free-electrons.com>
---
 .../devicetree/bindings/pci/cdns,cdns-pcie-ep.txt    | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.txt

Comments

Rob Herring Nov. 26, 2017, 7:33 p.m. | #1
On Thu, Nov 23, 2017 at 04:01:49PM +0100, Cyrille Pitchen wrote:
> This patch documents the DT bindings for the Cadence PCIe controller
> when configured in endpoint mode.
> 
> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@free-electrons.com>
> ---
>  .../devicetree/bindings/pci/cdns,cdns-pcie-ep.txt    | 20 ++++++++++++++++++++
>  1 file changed, 20 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.txt

Acked-by: Rob Herring <robh@kernel.org>

Patch

diff --git a/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.txt b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.txt
new file mode 100644
index 000000000000..d4168d79cceb
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.txt
@@ -0,0 +1,20 @@ 
+* Cadence PCIe endpoint controller
+
+Required properties:
+- compatible: should contain "cdns,cdns-pcie-ep" to identify the IP used.
+- reg: should contain the controller register base address and AXI interface
+  region base address respectively.
+- reg-names: Must be "reg" and "mem" respectively.
+
+Optional properties:
+- max-functions: maximum number of functions that can be configured.
+
+Example:
+
+	pci@fc000000 {
+		compatible = "cdns,cdns-pcie-ep";
+		reg = <0x0 0xfc000000 0x0 0x01000000>, /* Base Address */
+		      <0x0 0x80000000 0x0 0x40000000>; /* AXI region */
+		reg-names = "reg", "mem";
+		max-functions = /bits/ 8 <8>;
+	};