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[rs6000] (v2) testcase updates for fold-vec-abs-* for power9 codegen

Message ID 1511215614.26707.352.camel@brimstone.rchland.ibm.com
State New
Headers show
Series [rs6000] (v2) testcase updates for fold-vec-abs-* for power9 codegen | expand

Commit Message

will schmidt Nov. 20, 2017, 10:06 p.m. UTC 
Hi,
    
Add additional scan-assembler entries for those tests with
simple variations in codegen. (for power9, versus power8, etc).
    
    
    2017-11-20  Will Schmidt  <will_schmidt@vnet.ibm.com>
    
    [testsuite]
    
        * fold-vec-abs-char-fwrapv.c: Add xxspltib insn to expected output.
        * fold-vec-abs-char.c: Add xxspltib insn to expected output list.

Comments

Segher Boessenkool Nov. 23, 2017, 7:32 p.m. UTC | #1 
Hi!

On Mon, Nov 20, 2017 at 04:06:54PM -0600, Will Schmidt wrote:
> Add additional scan-assembler entries for those tests with
> simple variations in codegen. (for power9, versus power8, etc).
>     
>     
>     2017-11-20  Will Schmidt  <will_schmidt@vnet.ibm.com>
>     
>     [testsuite]
>     
>         * fold-vec-abs-char-fwrapv.c: Add xxspltib insn to expected output.
>         * fold-vec-abs-char.c: Add xxspltib insn to expected output list.

Paths...  Otherwise, okay for trunk.  Thanks!


Segher
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Patch

diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-abs-char-fwrapv.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-abs-char-fwrapv.c
index 739f06e..8b9887d 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-abs-char-fwrapv.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-abs-char-fwrapv.c
@@ -1,7 +1,7 @@ 
 /* Verify that overloaded built-ins for vec_abs with char
-   inputs produce the right results.  */
+   inputs produce the right code.  */
 
 /* { dg-do compile } */
 /* { dg-require-effective-target powerpc_altivec_ok } */
 /* { dg-options "-maltivec -O2 -fwrapv" } */
 
@@ -11,8 +11,8 @@  vector signed char
 test2 (vector signed char x)
 {
   return vec_abs (x);
 }
 
-/* { dg-final { scan-assembler-times "vspltisw|vxor" 1 } } */
+/* { dg-final { scan-assembler-times "vspltisw|vxor|xxspltib" 1 } } */
 /* { dg-final { scan-assembler-times "vsububm" 1 } } */
 /* { dg-final { scan-assembler-times "vmaxsb" 1 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-abs-char.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-abs-char.c
index 239c919..1f303b8 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-abs-char.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-abs-char.c
@@ -1,7 +1,7 @@ 
 /* Verify that overloaded built-ins for vec_abs with char
-   inputs produce the right results.  */
+   inputs produce the right code.  */
 
 /* { dg-do compile } */
 /* { dg-require-effective-target powerpc_altivec_ok } */
 /* { dg-options "-maltivec -O2" } */
 
@@ -11,8 +11,8 @@  vector signed char
 test2 (vector signed char x)
 {
   return vec_abs (x);
 }
 
-/* { dg-final { scan-assembler-times "vspltisw|vxor" 1 } } */
+/* { dg-final { scan-assembler-times "vspltisw|vxor|xxspltib" 1 } } */
 /* { dg-final { scan-assembler-times "vsububm" 1 } } */
 /* { dg-final { scan-assembler-times "vmaxsb" 1 } } */