From patchwork Mon Feb 21 16:38:47 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christophe Lyon X-Patchwork-Id: 83857 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 5883CB7145 for ; Tue, 22 Feb 2011 03:47:28 +1100 (EST) Received: from localhost ([127.0.0.1]:45573 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PrYuV-00027r-VM for incoming@patchwork.ozlabs.org; Mon, 21 Feb 2011 11:46:56 -0500 Received: from [140.186.70.92] (port=44861 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PrYmo-0006b8-5R for qemu-devel@nongnu.org; Mon, 21 Feb 2011 11:38:59 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1PrYml-0005O4-Aw for qemu-devel@nongnu.org; Mon, 21 Feb 2011 11:38:58 -0500 Received: from eu1sys200aog120.obsmtp.com ([207.126.144.149]:34553) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1PrYml-0005Nh-2P for qemu-devel@nongnu.org; Mon, 21 Feb 2011 11:38:55 -0500 Received: from source ([164.129.1.35]) (using TLSv1) by eu1sys200aob120.postini.com ([207.126.147.11]) with SMTP ID DSNKTWKVHn82z6mG0AK26llXrUd5UlqBH3JL@postini.com; Mon, 21 Feb 2011 16:38:54 UTC Received: from zeta.dmz-eu.st.com (ns2.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 3F2CE3CF for ; Mon, 21 Feb 2011 16:38:53 +0000 (GMT) Received: from Webmail-eu.st.com (safex1hubcas6.st.com [10.75.90.73]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 0A2514E09 for ; Mon, 21 Feb 2011 16:38:53 +0000 (GMT) Received: from localhost.localdomain (164.129.122.40) by webmail-eu.st.com (10.75.90.13) with Microsoft SMTP Server (TLS) id 8.2.234.1; Mon, 21 Feb 2011 17:38:52 +0100 From: Christophe Lyon To: Date: Mon, 21 Feb 2011 17:38:47 +0100 Message-ID: <1298306328-25643-5-git-send-email-christophe.lyon@st.com> X-Mailer: git-send-email 1.7.2.3 In-Reply-To: <1298306328-25643-1-git-send-email-christophe.lyon@st.com> References: <1298306328-25643-1-git-send-email-christophe.lyon@st.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6, seldom 2.4 (older, 4) X-Received-From: 207.126.144.149 Subject: [Qemu-devel] [PATCH 4/5] target-arm: fix support for VRECPE. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Now use the same algorithm as described in the ARM ARM. Signed-off-by: Christophe Lyon Reviewed-by: Peter Maydell --- target-arm/helper.c | 83 +++++++++++++++++++++++++++++++++++++++++++------- 1 files changed, 71 insertions(+), 12 deletions(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index 30c1809..031f2ec 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -2692,13 +2692,67 @@ float32 HELPER(rsqrts_f32)(float32 a, float32 b, CPUState *env) #define float64_256 make_float64(0x4070000000000000LL) #define float64_512 make_float64(0x4080000000000000LL) -/* TODO: The architecture specifies the value that the estimate functions - should return. We return the exact reciprocal/root instead. */ +/* The algorithm that must be used to calculate the estimate + * is specified by the ARM ARM. + */ +static float64 recip_estimate(float64 a, CPUState *env) +{ + float_status *s = &env->vfp.standard_fp_status; + /* q = (int)(a * 512.0) */ + float64 q = float64_mul(float64_512, a, s); + int64_t q_int = float64_to_int64_round_to_zero(q, s); + + /* r = 1.0 / (((double)q + 0.5) / 512.0) */ + q = int64_to_float64(q_int, s); + q = float64_add(q, float64_half, s); + q = float64_div(q, float64_512, s); + q = float64_div(float64_one, q, s); + + /* s = (int)(256.0 * r + 0.5) */ + q = float64_mul(q, float64_256, s); + q = float64_add(q, float64_half, s); + q_int = float64_to_int64_round_to_zero(q, s); + + /* return (double)s / 256.0 */ + return float64_div(int64_to_float64(q_int, s), float64_256, s); +} + float32 HELPER(recpe_f32)(float32 a, CPUState *env) { - float_status *s = &env->vfp.fp_status; - float32 one = int32_to_float32(1, s); - return float32_div(one, a, s); + float_status *s = &env->vfp.standard_fp_status; + float64 f64; + uint32_t val32 = float32_val(a); + + int result_exp; + int a_exp = (val32 & 0x7f800000) >> 23; + int sign = val32 & 0x80000000; + + if (float32_is_any_nan(a)) { + if (float32_is_signaling_nan(a)) { + float_raise(float_flag_invalid, s); + } + return float32_default_nan; + } else if (float32_is_infinity(a)) { + return float32_set_sign(float32_zero, float32_is_neg(a)); + } else if (float32_is_zero_or_denormal(a)) { + float_raise(float_flag_divbyzero, s); + return float32_set_sign(float32_infinity, float32_is_neg(a)); + } else if (a_exp >= 253) { + float_raise(float_flag_underflow, s); + return float32_set_sign(float32_zero, float32_is_neg(a)); + } + + f64 = make_float64((0x3feULL << 52) + | ((int64_t)(val32 & 0x7fffff) << 29)); + + result_exp = 253 - a_exp; + + f64 = recip_estimate(f64, env); + + val32 = sign + | ((result_exp & 0xff) << 23) + | ((float64_val(f64) >> 29) & 0x7fffff); + return make_float32(val32); } float32 HELPER(rsqrte_f32)(float32 a, CPUState *env) @@ -2710,13 +2764,18 @@ float32 HELPER(rsqrte_f32)(float32 a, CPUState *env) uint32_t HELPER(recpe_u32)(uint32_t a, CPUState *env) { - float_status *s = &env->vfp.fp_status; - float32 tmp; - tmp = int32_to_float32(a, s); - tmp = float32_scalbn(tmp, -32, s); - tmp = helper_recpe_f32(tmp, env); - tmp = float32_scalbn(tmp, 31, s); - return float32_to_int32(tmp, s); + float64 f64; + + if ((a & 0x80000000) == 0) { + return 0xffffffff; + } + + f64 = make_float64((0x3feULL << 52) + | ((int64_t)(a & 0x7fffffff) << 21)); + + f64 = recip_estimate (f64, env); + + return 0x80000000 | ((float64_val(f64) >> 21) & 0x7fffffff); } uint32_t HELPER(rsqrte_u32)(uint32_t a, CPUState *env)