[U-Boot,v6,7/7] ls1088a: Add VID support for QDS and RDB platforms

Message ID 1510643206-28716-8-git-send-email-rajesh.bhagat@nxp.com
State New
Delegated to: York Sun
Headers show
Series
  • Add VID support for QDS and RDB platforms
Related show

Commit Message

Rajesh Bhagat Nov. 14, 2017, 7:06 a.m.
This patch adds the support for VID on LS1088AQDS and LS1088ARDB systems.
It reads the fusesr register and changes the VDD accordingly by adjusting
the voltage via LTC3882 regulator.

This patch also takes care of the special case of 0.9V VDD is present in
fusesr register. In that case,it also changes the SERDES voltage by
disabling the SERDES, changing the SVDD and then re-enabling SERDES.

Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
---
Changes in v6:                                                                  
 None

Changes in v5:
 None

Changes in v4:
 None

Changes in v3:
 Restructured LS1088A VID support to use common VID driver
 Removed APIs getLSB/MSB and used bit operations.

Changes in v2:
 Checkpatch errors fixed

 board/freescale/ls1088a/ls1088a.c | 121 ++++++++++++++++++++++++++++++++++++++
 include/configs/ls1088aqds.h      |  13 ++++
 include/configs/ls1088ardb.h      |  14 +++++
 3 files changed, 148 insertions(+)

Patch

diff --git a/board/freescale/ls1088a/ls1088a.c b/board/freescale/ls1088a/ls1088a.c
index 96d9ae7..94f76df 100644
--- a/board/freescale/ls1088a/ls1088a.c
+++ b/board/freescale/ls1088a/ls1088a.c
@@ -18,9 +18,13 @@ 
 #include <environment.h>
 #include <asm/arch-fsl-layerscape/soc.h>
 #include <asm/arch/ppa.h>
+#include <asm/arch/fsl_serdes.h>
+#include <asm/arch/soc.h>
 
 #include "../common/qixis.h"
 #include "ls1088a_qixis.h"
+#include "../common/vid.h"
+#include <fsl_immap.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -296,6 +300,121 @@  void board_retimer_init(void)
 	select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
 }
 
+int i2c_multiplexer_select_vid_channel(u8 channel)
+{
+	return select_i2c_ch_pca9547(channel);
+}
+
+#ifdef CONFIG_TARGET_LS1088AQDS
+/* read the current value(SVDD) of the LTM Regulator Voltage */
+int get_serdes_volt(void)
+{
+	int  ret, vcode = 0;
+	u8 chan = PWM_CHANNEL0;
+
+	/* Select the PAGE 0 using PMBus commands PAGE for VDD */
+	ret = i2c_write(I2C_SVDD_MONITOR_ADDR,
+			PMBUS_CMD_PAGE, 1, &chan, 1);
+	if (ret) {
+		printf("VID: failed to select VDD Page 0\n");
+		return ret;
+	}
+
+	/* Read the output voltage using PMBus command READ_VOUT */
+	ret = i2c_read(I2C_SVDD_MONITOR_ADDR,
+		       PMBUS_CMD_READ_VOUT, 1, (void *)&vcode, 2);
+	if (ret) {
+		printf("VID: failed to read the volatge\n");
+		return ret;
+	}
+	return vcode;
+}
+
+int set_serdes_volt(int svdd)
+{
+	int ret, vdd_last;
+	u8 buff[5] = {0x04, PWM_CHANNEL0, PMBUS_CMD_VOUT_COMMAND,
+			svdd & 0xFF, (svdd & 0xFF00) >> 8};
+
+	/* Write the desired voltage code to the SVDD regulator */
+	ret = i2c_write(I2C_SVDD_MONITOR_ADDR,
+			PMBUS_CMD_PAGE_PLUS_WRITE, 1, (void *)&buff, 5);
+	if (ret) {
+		printf("VID: I2C failed to write to the volatge regulator\n");
+		return -1;
+	}
+
+	/* Wait for the volatge to get to the desired value */
+	do {
+		vdd_last = get_serdes_volt();
+		if (vdd_last < 0) {
+			printf("VID: Couldn't read sensor abort VID adjust\n");
+			return -1;
+		}
+	} while (vdd_last != svdd);
+
+	return 1;
+}
+#else
+int get_serdes_volt(void)
+{
+	return 0;
+}
+
+int set_serdes_volt(int svdd)
+{
+	int ret;
+	u8 brdcfg4;
+
+	printf("SVDD changing of RDB\n");
+
+	/* Read the BRDCFG54 via CLPD */
+	ret = i2c_read(CONFIG_SYS_I2C_FPGA_ADDR,
+		       QIXIS_BRDCFG4_OFFSET, 1, (void *)&brdcfg4, 1);
+	if (ret) {
+		printf("VID: I2C failed to read the CPLD BRDCFG4\n");
+		return -1;
+	}
+
+	brdcfg4 = brdcfg4 | 0x08;
+
+	/* Write to the BRDCFG4 */
+	ret = i2c_write(CONFIG_SYS_I2C_FPGA_ADDR,
+			QIXIS_BRDCFG4_OFFSET, 1, (void *)&brdcfg4, 1);
+	if (ret) {
+		debug("VID: I2C failed to set the SVDD CPLD BRDCFG4\n");
+		return -1;
+	}
+
+	/* Wait for the volatge to get to the desired value */
+	udelay(10000);
+
+	return 1;
+}
+#endif
+
+/* this function disables the SERDES, changes the SVDD Voltage and enables it*/
+int board_adjust_vdd(int vdd)
+{
+	int ret = 0;
+
+	debug("%s: vdd = %d\n", __func__, vdd);
+
+	/* Special settings to be performed when voltage is 900mV */
+	if (vdd == 900) {
+#ifdef CONFIG_SYS_FSL_DDR
+		ddr_enable_0v9_volt(true);
+#endif
+		ret = setup_serdes_volt(vdd);
+		if (ret < 0) {
+			ret = -1;
+			goto exit;
+		}
+	}
+exit:
+	return ret;
+}
+
 int board_init(void)
 {
 	init_final_memctl_regs();
@@ -314,6 +433,8 @@  int board_init(void)
 	/* invert AQR105 IRQ pins polarity */
 	out_le32(irq_ccsr + IRQCR_OFFSET / 4, AQR105_IRQ_MASK);
 #endif
+	if (adjust_vdd(0) < 0)
+		printf("core voltage not adjusted\n");
 
 #ifdef CONFIG_FSL_LS_PPA
 	ppa_init();
diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h
index 76570f2..417fe17 100644
--- a/include/configs/ls1088aqds.h
+++ b/include/configs/ls1088aqds.h
@@ -287,6 +287,19 @@  unsigned long get_board_ddr_clk(void);
 #define I2C_VOL_MONITOR_BUS_V_OFFSET   0x2
 #define I2C_VOL_MONITOR_BUS_V_OVF      0x1
 #define I2C_VOL_MONITOR_BUS_V_SHIFT    3
+#define I2C_SVDD_MONITOR_ADDR           0x4F
+
+#define CONFIG_VID_FLS_ENV              "ls1088aqds_vdd_mv"
+#ifndef CONFIG_SPL_BUILD
+#define CONFIG_VID
+#endif
+
+/* The lowest and highest voltage allowed for LS1088AQDS */
+#define VDD_MV_MIN			819
+#define VDD_MV_MAX			1212
+
+#define CONFIG_VOL_MONITOR_LTC3882_SET
+#define CONFIG_VOL_MONITOR_LTC3882_READ
 
 /* PM Bus commands code for LTC3882*/
 #define PMBUS_CMD_PAGE                  0x0
diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h
index feffd33..283b35c 100644
--- a/include/configs/ls1088ardb.h
+++ b/include/configs/ls1088ardb.h
@@ -137,6 +137,7 @@ 
 
 #define CONFIG_FSL_QIXIS
 #define CONFIG_SYS_I2C_FPGA_ADDR	0x66
+#define QIXIS_BRDCFG4_OFFSET            0x54
 #define QIXIS_LBMAP_SWITCH		2
 #define QIXIS_QMAP_MASK			0xe0
 #define QIXIS_QMAP_SHIFT		5
@@ -217,6 +218,19 @@ 
 #define I2C_VOL_MONITOR_BUS_V_OFFSET   0x2
 #define I2C_VOL_MONITOR_BUS_V_OVF      0x1
 #define I2C_VOL_MONITOR_BUS_V_SHIFT    3
+#define I2C_SVDD_MONITOR_ADDR		0x4F
+
+#define CONFIG_VID_FLS_ENV              "ls1088ardb_vdd_mv"
+#ifndef CONFIG_SPL_BUILD
+#define CONFIG_VID
+#endif
+
+/* The lowest and highest voltage allowed for LS1088ARDB */
+#define VDD_MV_MIN			819
+#define VDD_MV_MAX			1212
+
+#define CONFIG_VOL_MONITOR_LTC3882_SET
+#define CONFIG_VOL_MONITOR_LTC3882_READ
 
 /* PM Bus commands code for LTC3882*/
 #define PMBUS_CMD_PAGE                  0x0