mtd: chips: Add PMC flash memory description

Message ID 20171112063047.13797-1-prasannatsmkumar@gmail.com
State New
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  • mtd: chips: Add PMC flash memory description
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Commit Message

PrasannaKumar Muralidharan Nov. 12, 2017, 6:30 a.m.
Add PMC flash memory description.

Signed-off-by: PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com>
---
This patch is taken from OpenWRT [1]. This is compile tested only. As
there is no signed off by or author info in the commit [1] I have kept
only my signed off by line. If this is incorrect please advice what I
should do.

1. https://git.lede-project.org/?p=source.git;a=blob;f=target/linux/adm5120/patches-3.18/102-jedec_pmc_39lvxxx_chips.patch;h=00148fa602b68c25ff8cd936924b77f6c99caa07;hb=c03d4317a6bc891cb4a5e89cbdd77f37c23aff86

 drivers/mtd/chips/jedec_probe.c | 52 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 52 insertions(+)

Comments

Marek Vasut Nov. 13, 2017, 2:23 p.m. | #1
On 11/12/2017 07:30 AM, PrasannaKumar Muralidharan wrote:
> Add PMC flash memory description.
> 
> Signed-off-by: PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com>
> ---
> This patch is taken from OpenWRT [1]. This is compile tested only. As
> there is no signed off by or author info in the commit [1] I have kept
> only my signed off by line. If this is incorrect please advice what I
> should do.
> 
> 1. https://git.lede-project.org/?p=source.git;a=blob;f=target/linux/adm5120/patches-3.18/102-jedec_pmc_39lvxxx_chips.patch;h=00148fa602b68c25ff8cd936924b77f6c99caa07;hb=c03d4317a6bc891cb4a5e89cbdd77f37c23aff86

I'm not a big fan of adding untested stuff into the kernel.

>  drivers/mtd/chips/jedec_probe.c | 52 +++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 52 insertions(+)
> 
> diff --git a/drivers/mtd/chips/jedec_probe.c b/drivers/mtd/chips/jedec_probe.c
> index 7c0b27d..d315491 100644
> --- a/drivers/mtd/chips/jedec_probe.c
> +++ b/drivers/mtd/chips/jedec_probe.c
> @@ -115,6 +115,10 @@
>  #define UPD29F064115	0x221C
>  
>  /* PMC */
> +#define PM39LV512	0x001B
> +#define PM39LV010	0x001C
> +#define PM39LV020	0x003D
> +#define PM39LV040	0x003E
>  #define PM49FL002	0x006D
>  #define PM49FL004	0x006E
>  #define PM49FL008	0x006A
> @@ -1261,6 +1265,54 @@ static const struct amd_flash_info jedec_table[] = {
>  		}
>  	}, {
>  		.mfr_id		= CFI_MFR_PMC,
> +		.dev_id		= PM39LV512,
> +		.name		= "PMC Pm39LV512",
> +		.devtypes	= CFI_DEVICETYPE_X8,
> +		.uaddr		= MTD_UADDR_0x0555_0x02AA,
> +		.dev_size	= SIZE_64KiB,
> +		.cmd_set	= P_ID_AMD_STD,
> +		.nr_regions	= 1,
> +		.regions	= {
> +			ERASEINFO(0x01000,16),
> +		}
> +	}, {
> +		.mfr_id		= CFI_MFR_PMC,
> +		.dev_id		= PM39LV010,
> +		.name		= "PMC Pm39LV010",
> +		.devtypes	= CFI_DEVICETYPE_X8,
> +		.uaddr		= MTD_UADDR_0x0555_0x02AA,
> +		.dev_size	= SIZE_128KiB,
> +		.cmd_set	= P_ID_AMD_STD,
> +		.nr_regions	= 1,
> +		.regions	= {
> +			ERASEINFO(0x01000,32),
> +		}
> +	}, {
> +		.mfr_id		= CFI_MFR_PMC,
> +		.dev_id		= PM39LV020,
> +		.name		= "PMC Pm39LV020",
> +		.devtypes	= CFI_DEVICETYPE_X8,
> +		.uaddr		= MTD_UADDR_0x0555_0x02AA,
> +		.dev_size	= SIZE_256KiB,
> +		.cmd_set	= P_ID_AMD_STD,
> +		.nr_regions	= 1,
> +		.regions	= {
> +			ERASEINFO(0x01000,64),
> +		}
> +	}, {
> +		.mfr_id		= CFI_MFR_PMC,
> +		.dev_id		= PM39LV040,
> +		.name		= "PMC Pm39LV040",
> +		.devtypes	= CFI_DEVICETYPE_X8,
> +		.uaddr		= MTD_UADDR_0x0555_0x02AA,
> +		.dev_size	= SIZE_512KiB,
> +		.cmd_set	= P_ID_AMD_STD,
> +		.nr_regions	= 1,
> +		.regions	= {
> +			ERASEINFO(0x01000,128),
> +		}
> +	}, {
> +		.mfr_id		= CFI_MFR_PMC,
>  		.dev_id		= PM49FL002,
>  		.name		= "PMC Pm49FL002",
>  		.devtypes	= CFI_DEVICETYPE_X8,
>
PrasannaKumar Muralidharan Nov. 13, 2017, 4:25 p.m. | #2
Hi Marek,

On 13 November 2017 at 19:53, Marek Vasut <marek.vasut@gmail.com> wrote:
> On 11/12/2017 07:30 AM, PrasannaKumar Muralidharan wrote:
>> Add PMC flash memory description.
>>
>> Signed-off-by: PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com>
>> ---
>> This patch is taken from OpenWRT [1]. This is compile tested only. As
>> there is no signed off by or author info in the commit [1] I have kept
>> only my signed off by line. If this is incorrect please advice what I
>> should do.
>>
>> 1. https://git.lede-project.org/?p=source.git;a=blob;f=target/linux/adm5120/patches-3.18/102-jedec_pmc_39lvxxx_chips.patch;h=00148fa602b68c25ff8cd936924b77f6c99caa07;hb=c03d4317a6bc891cb4a5e89cbdd77f37c23aff86
>
> I'm not a big fan of adding untested stuff into the kernel.

It totally makes sense. I will see if I can find someone with the
board / openwrt to test. No guarantee that I will be able to find
someone to test. Please feel free to not consider this till someone
tests it.

Thanks,
PrasannaKumar

Patch

diff --git a/drivers/mtd/chips/jedec_probe.c b/drivers/mtd/chips/jedec_probe.c
index 7c0b27d..d315491 100644
--- a/drivers/mtd/chips/jedec_probe.c
+++ b/drivers/mtd/chips/jedec_probe.c
@@ -115,6 +115,10 @@ 
 #define UPD29F064115	0x221C
 
 /* PMC */
+#define PM39LV512	0x001B
+#define PM39LV010	0x001C
+#define PM39LV020	0x003D
+#define PM39LV040	0x003E
 #define PM49FL002	0x006D
 #define PM49FL004	0x006E
 #define PM49FL008	0x006A
@@ -1261,6 +1265,54 @@  static const struct amd_flash_info jedec_table[] = {
 		}
 	}, {
 		.mfr_id		= CFI_MFR_PMC,
+		.dev_id		= PM39LV512,
+		.name		= "PMC Pm39LV512",
+		.devtypes	= CFI_DEVICETYPE_X8,
+		.uaddr		= MTD_UADDR_0x0555_0x02AA,
+		.dev_size	= SIZE_64KiB,
+		.cmd_set	= P_ID_AMD_STD,
+		.nr_regions	= 1,
+		.regions	= {
+			ERASEINFO(0x01000,16),
+		}
+	}, {
+		.mfr_id		= CFI_MFR_PMC,
+		.dev_id		= PM39LV010,
+		.name		= "PMC Pm39LV010",
+		.devtypes	= CFI_DEVICETYPE_X8,
+		.uaddr		= MTD_UADDR_0x0555_0x02AA,
+		.dev_size	= SIZE_128KiB,
+		.cmd_set	= P_ID_AMD_STD,
+		.nr_regions	= 1,
+		.regions	= {
+			ERASEINFO(0x01000,32),
+		}
+	}, {
+		.mfr_id		= CFI_MFR_PMC,
+		.dev_id		= PM39LV020,
+		.name		= "PMC Pm39LV020",
+		.devtypes	= CFI_DEVICETYPE_X8,
+		.uaddr		= MTD_UADDR_0x0555_0x02AA,
+		.dev_size	= SIZE_256KiB,
+		.cmd_set	= P_ID_AMD_STD,
+		.nr_regions	= 1,
+		.regions	= {
+			ERASEINFO(0x01000,64),
+		}
+	}, {
+		.mfr_id		= CFI_MFR_PMC,
+		.dev_id		= PM39LV040,
+		.name		= "PMC Pm39LV040",
+		.devtypes	= CFI_DEVICETYPE_X8,
+		.uaddr		= MTD_UADDR_0x0555_0x02AA,
+		.dev_size	= SIZE_512KiB,
+		.cmd_set	= P_ID_AMD_STD,
+		.nr_regions	= 1,
+		.regions	= {
+			ERASEINFO(0x01000,128),
+		}
+	}, {
+		.mfr_id		= CFI_MFR_PMC,
 		.dev_id		= PM49FL002,
 		.name		= "PMC Pm49FL002",
 		.devtypes	= CFI_DEVICETYPE_X8,