From patchwork Sat Nov 11 20:49:26 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bean Huo X-Patchwork-Id: 837073 X-Patchwork-Delegate: cyrille.pitchen@atmel.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.infradead.org (client-ip=65.50.211.133; helo=bombadil.infradead.org; envelope-from=linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="lxNqFGKH"; dkim-atps=neutral Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3yZ8Fr1hg9z9t2S for ; Sun, 12 Nov 2017 07:51:23 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:To :From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=SKFA0YZ9jb3RRPalQ5DmB3f0VqJgJ3SIeGatO0msWb8=; b=lxNqFGKH67jnjb KNbk9YZcEO0VJSbSEZJyIg3ODnaKaYR+dbKkEDRqdS8iLRVNZW8kubwMGnDq1E/1jhTxSVtxznuxW Mtp91N42tD96Ywrsrrlcc9CEkD8xg3t8nnjNbEsK7AeTTb/BIcv207NVcGdXjWREN8K5nRAuxOvD1 GfLF7iTOBvitbVoXS/hixUSFNONtSiZqI1p1vL7XzXOEtSZChtX8uUBLUA6sXjH4CLxD8BFga/vcE hsJBdPfB4zMVcNO6UMLQe67K+4yaiCvHJoAC5NDpRG7dbrUvtlP/+faLwX3l6LB95gEKWnO/dJMsn a3LrEBbcecYEolSixE+Q==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1eDcjt-0005o0-1n; Sat, 11 Nov 2017 20:50:53 +0000 Received: from mailout.micron.com ([137.201.242.129]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1eDcjQ-0004Yk-UK for linux-mtd@lists.infradead.org; Sat, 11 Nov 2017 20:50:26 +0000 Received: from mail.micron.com (bowex36h.micron.com [137.201.84.179]) by mailout.micron.com (8.14.4/8.14.6) with ESMTP id vABKnT2J030624; Sat, 11 Nov 2017 13:49:29 -0700 Received: from SIWEX4H.sing.micron.com (10.160.29.19) by BOWEX36H.micron.com (137.201.84.179) with Microsoft SMTP Server (TLS) id 15.0.1293.2; Sat, 11 Nov 2017 13:49:29 -0700 Received: from SIWEX5A.sing.micron.com (10.160.29.59) by SIWEX4H.sing.micron.com (10.160.29.19) with Microsoft SMTP Server (TLS) id 15.0.1293.2; Sun, 12 Nov 2017 04:49:26 +0800 Received: from SIWEX5A.sing.micron.com ([fe80::390a:b1cc:42e9:d13e]) by SIWEX5A.sing.micron.com ([fe80::390a:b1cc:42e9:d13e%25]) with mapi id 15.00.1293.002; Sun, 12 Nov 2017 04:49:26 +0800 From: "Bean Huo (beanhuo)" To: "cyrille.pitchen@wedev4u.fr" , "marek.vasut@gmail.com" Subject: [PATCH V1] drivers:mtd:spi-nor:checkup FSR error bits Thread-Topic: [PATCH V1] drivers:mtd:spi-nor:checkup FSR error bits Thread-Index: AdNbLnANiN9w/sqbSQ2ul0T8cA7X8w== Date: Sat, 11 Nov 2017 20:49:26 +0000 Message-ID: <825c7a1bb1034369b9d592a7b358030c@SIWEX5A.sing.micron.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-exchange-transport-fromentityheader: Hosted x-originating-ip: [137.201.84.23] X-TM-AS-Product-Ver: SMEX-12.0.0.1464-8.100.1062-23458.004 X-TM-AS-Result: No--6.938900-0.000000-31 X-TM-AS-MatchedID: 703788-702942-703543-701177-708712-705861-706719-704318-7 02039-707027-704980-700648-862883-188019-706290-706592-711109-700398-863596 -700324-707788-703454-863828-704713-708804-710375-148004-148050-148980-4200 0-42003-29961-63 X-TM-AS-User-Approved-Sender: Yes X-TM-AS-User-Blocked-Sender: No x-mt-checkinternalsenderrule: True MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.78 on 137.201.130.65 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20171111_125025_081148_A37CE5F2 X-CRM114-Status: UNSURE ( 9.96 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -4.2 (----) X-Spam-Report: SpamAssassin version 3.4.1 on bombadil.infradead.org summary: Content analysis details: (-4.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record -0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [137.201.242.129 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "linux-mtd@lists.infradead.org" , "computersforpeace@gmail.com" , "dwmw2@infradead.org" , "linux-kernel@vger.kernel.org" Sender: "linux-mtd" Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org For the Micron SPI NOR, when the erase/program operation fails, especially, for the failure results from intending to modify protected space, spi-nor upper layers still get the return which shows the operation succeeds. this because spi_nor_fsr_ready() only uses bit.7 to device whether ready. For the most cases, even the error of erase/program occurs, SPI NOR device is still ready. The device ready and the error are two different cases. This patch is to fixup this issue and adding FSR (flag status register) error bits checkup. The FSR(flag status register) is a powerful tool to investigate the staus of device,checking information regarding what is actually doing the memory and detecting possible error conditions. Signed-off-by: beanhuo --- drivers/mtd/spi-nor/spi-nor.c | 19 +++++++++++++++++-- include/linux/mtd/spi-nor.h | 6 +++++- 2 files changed, 22 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index bc266f7..200e814 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -330,8 +330,23 @@ static inline int spi_nor_fsr_ready(struct spi_nor *nor) int fsr = read_fsr(nor); if (fsr < 0) return fsr; - else - return fsr & FSR_READY; + + if (fsr & (FSR_E_ERR | FSR_P_ERR)) { + if (fsr & FSR_E_ERR) + dev_err(nor->dev, "Erase operation failed.\n"); + else + dev_err(nor->dev, "Program operation failed.\n"); + + if (fsr & FSR_PT_ERR) + dev_err(nor->dev, + "The operation has attempted to modify the protected" + "sector or the locked OPT space.\n"); + + nor->write_reg(nor, SPINOR_OP_CLFSR, NULL, 0); + return -EIO; + } + + return fsr & FSR_READY; } static int spi_nor_ready(struct spi_nor *nor) diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index d0c66a0..46b5608 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -61,6 +61,7 @@ #define SPINOR_OP_RDSFDP 0x5a /* Read SFDP */ #define SPINOR_OP_RDCR 0x35 /* Read configuration register */ #define SPINOR_OP_RDFSR 0x70 /* Read flag status register */ +#define SPINOR_OP_CLFSR 0x50 /* Clear flag status register */ /* 4-byte address opcodes - used on Spansion and some Macronix flashes. */ #define SPINOR_OP_READ_4B 0x13 /* Read data bytes (low frequency) */ @@ -130,7 +131,10 @@ #define EVCR_QUAD_EN_MICRON BIT(7) /* Micron Quad I/O */ /* Flag Status Register bits */ -#define FSR_READY BIT(7) +#define FSR_READY BIT(7) /* Device status, 0 = Busy,1 = Ready */ +#define FSR_E_ERR BIT(5) /* Erase operation status */ +#define FSR_P_ERR BIT(4) /* Program operation status */ +#define FSR_PT_ERR BIT(1) /* Protection error bit */ /* Configuration Register bits. */ #define CR_QUAD_EN_SPAN BIT(1) /* Spansion Quad I/O */