Message ID | 1510061722-14092-3-git-send-email-peter.maydell@linaro.org |
---|---|
State | New |
Headers | show |
Series | [PULL,1/7] arm: implement cache/shareability attribute bits for PAR registers | expand |
diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c index 26fd214..59ef33e 100644 --- a/hw/arm/fsl-imx6.c +++ b/hw/arm/fsl-imx6.c @@ -440,8 +440,9 @@ static void fsl_imx6_class_init(ObjectClass *oc, void *data) DeviceClass *dc = DEVICE_CLASS(oc); dc->realize = fsl_imx6_realize; - dc->desc = "i.MX6 SOC"; + /* Reason: Uses serial_hds[] in the realize() function */ + dc->user_creatable = false; } static const TypeInfo fsl_imx6_type_info = {