Message ID | 1510061722-14092-7-git-send-email-peter.maydell@linaro.org |
---|---|
State | New |
Headers | show |
Series | [PULL,1/7] arm: implement cache/shareability attribute bits for PAR registers | expand |
diff --git a/hw/intc/arm_gicv3_its_kvm.c b/hw/intc/arm_gicv3_its_kvm.c index 39903d5..9b00ce5 100644 --- a/hw/intc/arm_gicv3_its_kvm.c +++ b/hw/intc/arm_gicv3_its_kvm.c @@ -111,13 +111,13 @@ static void kvm_arm_its_realize(DeviceState *dev, Error **errp) error_free(s->migration_blocker); return; } + } else { + qemu_add_vm_change_state_handler(vm_change_state_handler, s); } kvm_msi_use_devid = true; kvm_gsi_direct_mapping = false; kvm_msi_via_irqfd_allowed = kvm_irqfds_enabled(); - - qemu_add_vm_change_state_handler(vm_change_state_handler, s); } /**