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[U-Boot,07/40] arm64: zynqmp: Label whole PL part as fpga_full region

Message ID 45f0c0c61112725439510571b55b5ff635e523a4.1509970359.git.michal.simek@xilinx.com
State Accepted
Commit 7689dce753195000ceeb32274fc802cf957f24dc
Delegated to: Michal Simek
Headers show
Series zynqmp: arm64: DT changes | expand

Commit Message

Michal Simek Nov. 6, 2017, 12:12 p.m. UTC 
From: Nava kishore Manne <nava.manne@xilinx.com>

This will simplify dt overlay structure for the whole PL.

Signed-off-by: Nava kishore Manne <navam@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

 arch/arm/dts/zynqmp.dtsi | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)
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Patch

diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index 3dd17e6c3f1e..877874e7bf1c 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -282,7 +282,14 @@ 
 		compatible = "arm,cortex-a53-edac";
 	};
 
-	pcap {
+	fpga_full: fpga-full {
+		compatible = "fpga-region";
+		fpga-mgr = <&pcap>;
+		#address-cells = <2>;
+		#size-cells = <2>;
+	};
+
+	pcap: pcap {
 		compatible = "xlnx,zynqmp-pcap-fpga";
 	};