diff mbox series

[3/10] Add available_vector_sizes to target-supports.exp

Message ID 874lqbqqta.fsf@linaro.org
State New
Headers show
Series Vectoriser testsuite tweaks | expand

Commit Message

Richard Sandiford Nov. 3, 2017, 4:18 p.m. UTC 
This patch adds a routine that lists the available vector sizes
for a target and uses it for some existing target conditions.
Later patches add more uses.

The cases are taken from multiple_sizes.


2017-11-03  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/testsuite/
	* lib/target-supports.exp (available_vector_sizes): New proc.
	(check_effective_target_vect_multiple_sizes): Use it.
	(check_effective_target_vect64): Likewise.
	(check_effective_target_vect_sizes_32B_16B): Likewise.

Comments

Jeff Law Nov. 8, 2017, 7:11 p.m. UTC | #1 
On 11/03/2017 10:18 AM, Richard Sandiford wrote:
> This patch adds a routine that lists the available vector sizes
> for a target and uses it for some existing target conditions.
> Later patches add more uses.
> 
> The cases are taken from multiple_sizes.
> 
> 
> 2017-11-03  Richard Sandiford  <richard.sandiford@linaro.org>
> 	    Alan Hayward  <alan.hayward@arm.com>
> 	    David Sherwood  <david.sherwood@arm.com>
> 
> gcc/testsuite/
> 	* lib/target-supports.exp (available_vector_sizes): New proc.
> 	(check_effective_target_vect_multiple_sizes): Use it.
> 	(check_effective_target_vect64): Likewise.
> 	(check_effective_target_vect_sizes_32B_16B): Likewise.
OK.
jeff
Christophe Lyon Nov. 17, 2017, 1:17 p.m. UTC | #2 
Hi Richard,


On 8 November 2017 at 20:11, Jeff Law <law@redhat.com> wrote:
> On 11/03/2017 10:18 AM, Richard Sandiford wrote:
>> This patch adds a routine that lists the available vector sizes
>> for a target and uses it for some existing target conditions.
>> Later patches add more uses.
>>
>> The cases are taken from multiple_sizes.
>>
>>
>> 2017-11-03  Richard Sandiford  <richard.sandiford@linaro.org>
>>           Alan Hayward  <alan.hayward@arm.com>
>>           David Sherwood  <david.sherwood@arm.com>
>>
>> gcc/testsuite/
>>       * lib/target-supports.exp (available_vector_sizes): New proc.
>>       (check_effective_target_vect_multiple_sizes): Use it.
>>       (check_effective_target_vect64): Likewise.
>>       (check_effective_target_vect_sizes_32B_16B): Likewise.

This patch (r254590) means that we now skip:
    gcc.dg/vect/vect-33.c -flto -ffat-lto-objects
scan-tree-dump-times vect "Alignment of access forced using
versioning" 1
    gcc.dg/vect/vect-33.c scan-tree-dump-times vect "Alignment of
access forced using versioning" 1
on armeb-none-linux-gnueabihf --with-fpu=neon-fp16

This is because of the change in vect64, which used to give a
different result on arm depending on the endianness.

I think that's not a big deal, but I thought I should mention it.

Christophe


> OK.
> jeff
diff mbox series

Patch

Index: gcc/testsuite/lib/target-supports.exp
===================================================================
--- gcc/testsuite/lib/target-supports.exp	2017-11-03 12:16:58.605777011 +0000
+++ gcc/testsuite/lib/target-supports.exp	2017-11-03 16:06:12.625838683 +0000
@@ -6581,46 +6581,38 @@  foreach N {2 3 4 8} {
     }]
 }
 
-# Return 1 if the target supports multiple vector sizes
+# Return the list of vector sizes (in bits) that each target supports.
+# A vector length of "0" indicates variable-length vectors.
 
-proc check_effective_target_vect_multiple_sizes { } {
-    global et_vect_multiple_sizes_saved
-    global et_index
-
-    set et_vect_multiple_sizes_saved($et_index) 0
-    if { [istarget aarch64*-*-*]
-	 || [is-effective-target arm_neon]
-	 || (([istarget i?86-*-*] || [istarget x86_64-*-*])
-	     && ([check_avx_available] && ![check_prefer_avx128])) } {
-	set et_vect_multiple_sizes_saved($et_index) 1
+proc available_vector_sizes { } {
+    set result {}
+    if { [istarget aarch64*-*-*] } {
+	lappend result 128 64
+    } elseif { [istarget arm*-*-*]
+		&& [check_effective_target_arm_neon_ok] } {
+	lappend result 128 64
+    } elseif { (([istarget i?86-*-*] || [istarget x86_64-*-*])
+		 && ([check_avx_available] && ![check_prefer_avx128])) } {
+	lappend result 256 128
+    } elseif { [istarget sparc*-*-*] } {
+	lappend result 64
+    } else {
+	# The traditional default asumption.
+	lappend result 128
     }
+    return $result
+}
+
+# Return 1 if the target supports multiple vector sizes
 
-    verbose "check_effective_target_vect_multiple_sizes:\
-	     returning $et_vect_multiple_sizes_saved($et_index)" 2
-    return $et_vect_multiple_sizes_saved($et_index)
+proc check_effective_target_vect_multiple_sizes { } {
+    return [expr { [llength [available_vector_sizes]] > 1 }]
 }
 
 # Return 1 if the target supports vectors of 64 bits.
 
 proc check_effective_target_vect64 { } {
-    global et_vect64_saved
-    global et_index
-
-    if [info exists et_vect64_saved($et_index)] {
-        verbose "check_effective_target_vect64: using cached result" 2
-    } else {
-	set et_vect64_saved($et_index) 0
-        if { ([is-effective-target arm_neon]
-	      && [check_effective_target_arm_little_endian])
-	     || [istarget aarch64*-*-*]
-             || [istarget sparc*-*-*] } {
-	   set et_vect64_saved($et_index) 1
-        }
-    }
-
-    verbose "check_effective_target_vect64:\
-	     returning $et_vect64_saved($et_index)" 2
-    return $et_vect64_saved($et_index)
+    return [expr { [lsearch -exact [available_vector_sizes] 64] >= 0 }]
 }
 
 # Return 1 if the target supports vector copysignf calls.
@@ -7747,11 +7739,7 @@  proc check_avx_available { } {
 # Return true if 32- and 16-bytes vectors are available.
 
 proc check_effective_target_vect_sizes_32B_16B { } {
-  if { [check_avx_available] && ![check_prefer_avx128] } {
-     return 1;
-  } else {
-    return 0;
-  }
+    return [expr { [available_vector_sizes] == [list 256 128] }]
 }
 
 # Return true if 16- and 8-bytes vectors are available.