| Message ID | 20110216090709.GR5778@Redstar.dorchain.net |
|---|---|
| State | Not Applicable |
| Delegated to: | David Miller |
| Headers | show |
Hello. On 16-02-2011 12:07, Joerg Dorchain wrote: > Hello all, > this patch in needed in addition to the previous one make > suspend/resume work in the forced ahci mode. This remark should probably follow --- tear line (after the signoff). > During resume from suspend to ram, the kernel pci layer restores > the registers for the SATA controller once, then says okay, and > sets dev->state_saved = false. However, since the restore goes > from highest address (the BARs [base address registers]) to > lowest register, some of the higher registers are set as RO > because according to the lower registers controller is in PIIX > mode. This patch introduces a workaround for > this problem, hacking around the PCI API by setting > pdev->state_saved = true > before we do the restore, basically leaving the pci config space > untouched. > Bye, > Joerg "Hello" and "bye" shouldn't be the part of the patch description. > Signed-off-by: joerg Dorchain<joerg@dorchain.net> Need space before the email address. WBR, Sergei -- To unsubscribe from this list: send the line "unsubscribe linux-ide" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
--- linux/drivers/ata/ahci.c.orig 2011-02-04 18:13:33.000000000 +0100 +++ linux/drivers/ata/ahci.c 2011-02-11 13:45:22.000000000 +0100 @@ -640,6 +640,11 @@ struct ata_host *host = dev_get_drvdata(&pdev->dev); int rc; + /* + * override check to see if PCI config space is already + * restored in pci_restore_state + */ + pdev->state_saved = true; rc = ata_pci_device_do_resume(pdev); if (rc) return rc;
Hello all, this patch in needed in addition to the previous one make suspend/resume work in the forced ahci mode. During resume from suspend to ram, the kernel pci layer restores the registers for the SATA controller once, then says okay, and sets dev->state_saved = false. However, since the restore goes from highest address (the BARs [base address registers]) to lowest register, some of the higher registers are set as RO because according to the lower registers controller is in PIIX mode. This patch introduces a workaround for this problem, hacking around the PCI API by setting pdev->state_saved = true before we do the restore, basically leaving the pci config space untouched. Bye, Joerg Signed-off-by: joerg Dorchain<joerg@dorchain.net>