diff mbox series

tcg/mips: make some functions inline.

Message ID 1509618375-164238-1-git-send-email-jiang.biao2@zte.com.cn
State New
Headers show
Series tcg/mips: make some functions inline. | expand

Commit Message

Jiang Biao Nov. 2, 2017, 10:26 a.m. UTC
Make some functions inline.

Signed-off-by: Jiang Biao <jiang.biao2@zte.com.cn>
---
 tcg/mips/tcg-target.inc.c | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

Comments

Richard Henderson Nov. 2, 2017, 10:53 a.m. UTC | #1
On 11/02/2017 11:26 AM, Jiang Biao wrote:
> Make some functions inline.

Why?

Do you have evidence that the compiler isn't making reasonable default choices
with respect to inlining?


r~
Jiang Biao Nov. 2, 2017, 11:23 a.m. UTC | #2
PiBPbiAxMS8wMi8yMDE3IDExOjI2IEFNLCBKaWFuZyBCaWFvIHdyb3RlOj4gPiBNYWtlIHNvbWUg
ZnVuY3Rpb25zIGlubGluZS4KPiAKPiBXaHk/Cj4gCj4gRG8geW91IGhhdmUgZXZpZGVuY2UgdGhh
dCB0aGUgY29tcGlsZXIgaXNuJ3QgbWFraW5nIHJlYXNvbmFibGUgZGVmYXVsdCBjaG9pY2VzCj4g
d2l0aCByZXNwZWN0IHRvIGlubGluaW5nPwpObywgOikgSnVzdCBmb3VuZCBzb21lIG9mIHRoZXNl
IGZ1bmN0aW9ucyBhcmUgaW5saW5lIGFuZCBvdGhlcnMgYXJlIG5vdCB3aGVuIHJlYWRpbmcgCnRo
ZSBjb2RlLCB0aGUgc3R5bGUgbG9va3MgaW5jb25zaXN0ZW50LiAKQmVzaWRlcywgVGhlIGNvbXBp
bGVyIG1heSBtYWtlIGRlZmF1bHQgaW5saW5lIGNob2ljZXMgZm9yIHNvbWUgZnVuY3Rpb25zLCBi
dXQgbWF5IApub3QgZm9yIHNvbWUgY2FzZXMoc29tZSBsb25nZXIgb25lcykuIEFkZGluZyBpbmxp
bmUgbWFudWFsbHkgY2FuIGd1YXJhbnRlZSBhbmQgCm5vdCBodXJ0LiA6KQpUaGFua3MuCgpyfg==
Richard Henderson Nov. 2, 2017, 11:43 a.m. UTC | #3
On 11/02/2017 12:23 PM, jiang.biao2@zte.com.cn wrote:
> No, :) Just found some of these functions are inline and others are not when reading 
> the code, the style looks inconsistent. 

My preference would be to remove them all.

> Besides, The compiler may make default inline choices for some functions, but may 
> not for some cases(some longer ones). Adding inline manually can guarantee and 
> not hurt. :)

The longer ones in particular should *not* be inline, so that we don't expand
the size of the code unnecessarily.  Which *can* hurt.


r~
Philippe Mathieu-Daudé via Nov. 2, 2017, 12:16 p.m. UTC | #4
On Thu, Nov 2, 2017 at 8:43 AM, Richard Henderson <rth@twiddle.net> wrote:
> On 11/02/2017 12:23 PM, jiang.biao2@zte.com.cn wrote:
>> No, :) Just found some of these functions are inline and others are not when reading
>> the code, the style looks inconsistent.
>
> My preference would be to remove them all.

If more people agree to this we should add an entry in HACKING coding
guidelines (not sure about checkpatch).
Jiang Biao Nov. 3, 2017, 12:37 a.m. UTC | #5
PiBPbiAxMS8wMi8yMDE3IDEyOjIzIFBNLCBqaWFuZy5iaWFvMkB6dGUuY29tLmNuIHdyb3RlOgo+
ID4gTm8sIDopIEp1c3QgZm91bmQgc29tZSBvZiB0aGVzZSBmdW5jdGlvbnMgYXJlIGlubGluZSBh
bmQgb3RoZXJzIGFyZSBub3Qgd2hlbiByZWFkaW5nCj4gPiB0aGUgY29kZSwgdGhlIHN0eWxlIGxv
b2tzIGluY29uc2lzdGVudC4KPiA+Cj4gTXkgcHJlZmVyZW5jZSB3b3VsZCBiZSB0byByZW1vdmUg
dGhlbSBhbGwuClNob3VsZCBJIGNvbW1pdCBhbm90aGVyIHBhdGNoIHRvIGRvIHRoYXQ/IDopIAoK
PiA+IEJlc2lkZXMsIFRoZSBjb21waWxlciBtYXkgbWFrZSBkZWZhdWx0IGlubGluZSBjaG9pY2Vz
IGZvciBzb21lIGZ1bmN0aW9ucywgYnV0IG1heQo+ID4gbm90IGZvciBzb21lIGNhc2VzKHNvbWUg
bG9uZ2VyIG9uZXMpLiBBZGRpbmcgaW5saW5lIG1hbnVhbGx5IGNhbiBndWFyYW50ZWUgYW5kCj4g
PiBub3QgaHVydC4gOikKPiBUaGUgbG9uZ2VyIG9uZXMgaW4gcGFydGljdWxhciBzaG91bGQgKm5v
dCogYmUgaW5saW5lLCBzbyB0aGF0IHdlIGRvbid0IGV4cGFuZAo+IHRoZSBzaXplIG9mIHRoZSBj
b2RlIHVubmVjZXNzYXJpbHkuICBXaGljaCAqY2FuKiBodXJ0LgpHb3QgdGhhdCwgdGhhbmtzIGZv
ciB0aGUgcmVwbHkuCgpSZWdhcmRzLA==
Richard Henderson Nov. 3, 2017, 8:42 a.m. UTC | #6
On 11/03/2017 01:37 AM, jiang.biao2@zte.com.cn wrote:
>> On 11/02/2017 12:23 PM, jiang.biao2@zte.com.cn wrote:
>>> No, :) Just found some of these functions are inline and others are not when reading
>>> the code, the style looks inconsistent.
>>>
>> My preference would be to remove them all.
> Should I commit another patch to do that? :) 

If you find the inconsistency distracting, yes.


r~
diff mbox series

Patch

diff --git a/tcg/mips/tcg-target.inc.c b/tcg/mips/tcg-target.inc.c
index 4b55ab8..f83a8ec 100644
--- a/tcg/mips/tcg-target.inc.c
+++ b/tcg/mips/tcg-target.inc.c
@@ -168,7 +168,7 @@  static inline void reloc_26(tcg_insn_unit *pc, tcg_insn_unit *target)
     *pc = deposit32(*pc, 0, 26, reloc_26_val(pc, target));
 }
 
-static void patch_reloc(tcg_insn_unit *code_ptr, int type,
+static inline void patch_reloc(tcg_insn_unit *code_ptr, int type,
                         intptr_t value, intptr_t addend)
 {
     tcg_debug_assert(type == R_MIPS_PC16);
@@ -507,7 +507,7 @@  static inline void tcg_out_opc_sa(TCGContext *s, MIPSInsn opc,
 
 }
 
-static void tcg_out_opc_sa64(TCGContext *s, MIPSInsn opc1, MIPSInsn opc2,
+static inline void tcg_out_opc_sa64(TCGContext *s, MIPSInsn opc1, MIPSInsn opc2,
                              TCGReg rd, TCGReg rt, TCGArg sa)
 {
     int32_t inst;
@@ -637,13 +637,13 @@  static inline void tcg_out_bswap16s(TCGContext *s, TCGReg ret, TCGReg arg)
     }
 }
 
-static void tcg_out_bswap_subr(TCGContext *s, tcg_insn_unit *sub)
+static inline void tcg_out_bswap_subr(TCGContext *s, tcg_insn_unit *sub)
 {
     bool ok = tcg_out_opc_jmp(s, OPC_JAL, sub);
     tcg_debug_assert(ok);
 }
 
-static void tcg_out_bswap32(TCGContext *s, TCGReg ret, TCGReg arg)
+static inline void tcg_out_bswap32(TCGContext *s, TCGReg ret, TCGReg arg)
 {
     if (use_mips32r2_instructions) {
         tcg_out_opc_reg(s, OPC_WSBH, ret, 0, arg);
@@ -656,7 +656,7 @@  static void tcg_out_bswap32(TCGContext *s, TCGReg ret, TCGReg arg)
     }
 }
 
-static void tcg_out_bswap32u(TCGContext *s, TCGReg ret, TCGReg arg)
+static inline void tcg_out_bswap32u(TCGContext *s, TCGReg ret, TCGReg arg)
 {
     if (use_mips32r2_instructions) {
         tcg_out_opc_reg(s, OPC_DSBH, ret, 0, arg);
@@ -670,7 +670,7 @@  static void tcg_out_bswap32u(TCGContext *s, TCGReg ret, TCGReg arg)
     }
 }
 
-static void tcg_out_bswap64(TCGContext *s, TCGReg ret, TCGReg arg)
+static inline void tcg_out_bswap64(TCGContext *s, TCGReg ret, TCGReg arg)
 {
     if (use_mips32r2_instructions) {
         tcg_out_opc_reg(s, OPC_DSBH, ret, 0, arg);
@@ -1103,7 +1103,7 @@  static void tcg_out_call_int(TCGContext *s, tcg_insn_unit *arg, bool tail)
     }
 }
 
-static void tcg_out_call(TCGContext *s, tcg_insn_unit *arg)
+static inline void tcg_out_call(TCGContext *s, tcg_insn_unit *arg)
 {
     tcg_out_call_int(s, arg, false);
     tcg_out_nop(s);
@@ -1661,7 +1661,7 @@  static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is_64)
 #endif
 }
 
-static void tcg_out_mb(TCGContext *s, TCGArg a0)
+static inline void tcg_out_mb(TCGContext *s, TCGArg a0)
 {
     static const MIPSInsn sync[] = {
         /* Note that SYNC_MB is a slightly weaker than SYNC 0,
@@ -2433,7 +2433,7 @@  static void tcg_target_detect_isa(void)
     sigaction(SIGILL, &sa_old, NULL);
 }
 
-static tcg_insn_unit *align_code_ptr(TCGContext *s)
+static inline tcg_insn_unit *align_code_ptr(TCGContext *s)
 {
     uintptr_t p = (uintptr_t)s->code_ptr;
     if (p & 15) {