| Message ID | 20171102093625.32342-1-ppandit@redhat.com |
|---|---|
| State | New |
| Headers | show |
| Series | pc: restrict port92 register value to 2 bits | expand |
On 02/11/2017 10:36, P J P wrote: > From: Prasad J Pandit <pjp@fedoraproject.org> > > Port 92 configuration register holds an 8-bit value. Of 8-bits, > bits 0-1 are used and 2-7 are reserved. Restrict the supplied > value to 2 bits. This patch is not necessary. "Do nothing and just report back the value that was written" is an okay implementation of reserved bits. Paolo > Reported-by: Niu Guoxiang <niuguoxiang@huawei.com> > Signed-off-by: Prasad J Pandit <pjp@fedoraproject.org> > --- > hw/i386/pc.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/hw/i386/pc.c b/hw/i386/pc.c > index 05985d4927..883384a599 100644 > --- a/hw/i386/pc.c > +++ b/hw/i386/pc.c > @@ -515,6 +515,7 @@ static void port92_write(void *opaque, hwaddr addr, uint64_t val, > Port92State *s = opaque; > int oldval = s->outport; > > + val &= 0x03; > DPRINTF("port92: write 0x%02" PRIx64 "\n", val); > s->outport = val; > qemu_set_irq(s->a20_out, (val >> 1) & 1); >
Hi Prasad, On 11/02/2017 06:37 AM, Paolo Bonzini wrote: > On 02/11/2017 10:36, P J P wrote: >> From: Prasad J Pandit <pjp@fedoraproject.org> >> >> Port 92 configuration register holds an 8-bit value. Of 8-bits, >> bits 0-1 are used and 2-7 are reserved. Restrict the supplied >> value to 2 bits. > > This patch is not necessary. "Do nothing and just report back the value > that was written" is an okay implementation of reserved bits. > > Paolo > > >> Reported-by: Niu Guoxiang <niuguoxiang@huawei.com> >> Signed-off-by: Prasad J Pandit <pjp@fedoraproject.org> >> --- >> hw/i386/pc.c | 1 + >> 1 file changed, 1 insertion(+) >> >> diff --git a/hw/i386/pc.c b/hw/i386/pc.c >> index 05985d4927..883384a599 100644 >> --- a/hw/i386/pc.c >> +++ b/hw/i386/pc.c >> @@ -515,6 +515,7 @@ static void port92_write(void *opaque, hwaddr addr, uint64_t val, >> Port92State *s = opaque; >> int oldval = s->outport; >> >> + val &= 0x03; >> DPRINTF("port92: write 0x%02" PRIx64 "\n", val); You might want to report a guest error instead: if (val & ~3) { qemu_log_mask(LOG_GUEST_ERROR, "port92: bits 2-7 are reserved " "(wrote 0x%02" PRIx64 ")\n", val); } >> s->outport = val; >> qemu_set_irq(s->a20_out, (val >> 1) & 1);
diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 05985d4927..883384a599 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -515,6 +515,7 @@ static void port92_write(void *opaque, hwaddr addr, uint64_t val, Port92State *s = opaque; int oldval = s->outport; + val &= 0x03; DPRINTF("port92: write 0x%02" PRIx64 "\n", val); s->outport = val; qemu_set_irq(s->a20_out, (val >> 1) & 1);