Patchwork make iq2000 use constraints.md

login
register
mail settings
Submitter Nathan Froyd
Date Feb. 15, 2011, 5:19 p.m.
Message ID <20110215171944.GR6247@codesourcery.com>
Download mbox | patch
Permalink /patch/83273/
State New
Headers show

Comments

Nathan Froyd - Feb. 15, 2011, 5:19 p.m.
On Tue, Feb 15, 2011 at 12:01:41PM +0000, Nick Clifton wrote:
>> I took the easy way out of defining null constraints, though I
>> suppose one could argue that the constraints shouldn't be in
>> iq2000.md in the first place.
>
> I think that it would be cleaner to remove them and fix the alternatives  
> in iq2000.md.  No sense in preserving cruft.

OK then.  How about this patch?  Tested the same way.

-Nathan

        * config/iq2000/i2000.h (REG_CLASS_FROM_LETTER): Delete.
        (CONST_OK_FOR_LETTER_P, CONST_DOUBLE_OK_FOR_LETTER_P): Delete.
        (EXTRA_CONSTRAINT): Delete.
        * config/iq2000/constraints.md: New file.
        * config/iq2000/iq2000.md: Include it.
	(define_insn ""): Delete.
	(movsi_internal2, movhi_internal2, movqi_internal2): Delete
	unsupported constraint letters from patterns.
	(call_value, call_value_internal1): Likewise.
	(call_value_multiple_internal1): Likewise.
Nick Clifton - Feb. 15, 2011, 5:25 p.m.
Hi Nathan,

>          * config/iq2000/i2000.h (REG_CLASS_FROM_LETTER): Delete.
>          (CONST_OK_FOR_LETTER_P, CONST_DOUBLE_OK_FOR_LETTER_P): Delete.
>          (EXTRA_CONSTRAINT): Delete.
>          * config/iq2000/constraints.md: New file.
>          * config/iq2000/iq2000.md: Include it.
> 	(define_insn ""): Delete.
> 	(movsi_internal2, movhi_internal2, movqi_internal2): Delete
> 	unsupported constraint letters from patterns.
> 	(call_value, call_value_internal1): Likewise.
> 	(call_value_multiple_internal1): Likewise.

Approved - please apply.

Cheers
   Nick

Patch

diff --git a/gcc/config/iq2000/constraints.md b/gcc/config/iq2000/constraints.md
new file mode 100644
index 0000000..8850592
--- /dev/null
+++ b/gcc/config/iq2000/constraints.md
@@ -0,0 +1,79 @@ 
+;; Constraints for Vitesse IQ2000 processors
+;; Copyright (C) 2011 Free Software Foundation, Inc.
+
+;; This file is part of GCC.
+
+;; GCC is free software; you can redistribute it and/or modify
+;; it under the terms of the GNU General Public License as published by
+;; the Free Software Foundation; either version 3, or (at your option)
+;; any later version.
+
+;; GCC is distributed in the hope that it will be useful,
+;; but WITHOUT ANY WARRANTY; without even the implied warranty of
+;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+;; GNU General Public License for more details.
+
+;; You should have received a copy of the GNU General Public License
+;; along with GCC; see the file COPYING3.  If not see
+;; <http://www.gnu.org/licenses/>.
+
+;; Register constraints.
+(define_register_constraint "b" "ALL_REGS"
+  "@internal")
+
+(define_register_constraint "d" "GR_REGS"
+  "@internal")
+
+(define_register_constraint "y" "GR_REGS"
+  "@internal")
+
+;; Integer constraints.
+(define_constraint "I"
+  "A 16-bit signed integer."
+  (and (match_code "const_int")
+       (match_test "IN_RANGE (ival, -32768, 32767)")))
+
+(define_constraint "J"
+  "Zero."
+  (and (match_code "const_int")
+       (match_test "ival == 0")))
+
+(define_constraint "K"
+  "A 16-bit unsigned integer"
+  (and (match_code "const_int")
+       (match_test "IN_RANGE (ival, 0, 65535)")))
+
+(define_constraint "L"
+  "A 32-bit constant whose bottom 16 bits are zero."
+  (and (match_code "const_int")
+      (ior (match_test "(ival | 0x7fff0000) == 0x7fff0000")
+	   (match_test "(ival | 0x7fff0000) + 0x10000 == 0"))))
+
+(define_constraint "M"
+  "Any constant not matched by 'I', 'K', or 'L'."
+  (and (match_code "const_int")
+       (match_test "!insn_const_int_ok_for_constraint (ival, CONSTRAINT_I)")
+       (match_test "!insn_const_int_ok_for_constraint (ival, CONSTRAINT_K)")
+       (match_test "!insn_const_int_ok_for_constraint (ival, CONSTRAINT_L)")))
+
+(define_constraint "N"
+  "Any constant whose lower or upper 16 bits are 0xffff."
+  (and (match_code "const_int")
+       (ior (match_test "(ival & 0xffff) == 0xffff")
+	    (match_test "(ival & 0xffff0000) == 0xffff0000"))))
+
+(define_constraint "O"
+  "A 5-bit signed integer."
+  (and (match_code "const_int")
+       (match_test "IN_RANGE (ival, -31, 31)")))
+
+;; Floating-point constraints.
+(define_constraint "G"
+  "Floating-point zero."
+  (and (match_code "const_double")
+       (match_test "op == CONST0_RTX (mode)")))
+
+;; Extra constraints.
+(define_constraint "R"
+  "A memory reference which takes one word for the instruction."
+  (match_test "simple_memory_operand (op, mode)"))
diff --git a/gcc/config/iq2000/iq2000.h b/gcc/config/iq2000/iq2000.h
index 95744b6..7f69d2a 100644
--- a/gcc/config/iq2000/iq2000.h
+++ b/gcc/config/iq2000/iq2000.h
@@ -235,12 +235,6 @@  enum reg_class
 
 #define INDEX_REG_CLASS NO_REGS
 
-#define REG_CLASS_FROM_LETTER(C) \
-  ((C) == 'd' ? GR_REGS :        \
-   (C) == 'b' ? ALL_REGS :       \
-   (C) == 'y' ? GR_REGS :        \
-   NO_REGS)
-
 #define REGNO_OK_FOR_INDEX_P(regno)	0
 
 #define PREFERRED_RELOAD_CLASS(X,CLASS)				\
@@ -257,53 +251,6 @@  enum reg_class
 #define CLASS_MAX_NREGS(CLASS, MODE)    \
   ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
 
-/* For IQ2000:
-
-   `I'	is used for the range of constants an arithmetic insn can
-	actually contain (16-bits signed integers).
-
-   `J'	is used for the range which is just zero (i.e., $r0).
-
-   `K'	is used for the range of constants a logical insn can actually
-	contain (16-bit zero-extended integers).
-
-   `L'	is used for the range of constants that be loaded with lui
-	(i.e., the bottom 16 bits are zero).
-
-   `M'	is used for the range of constants that take two words to load
-	(i.e., not matched by `I', `K', and `L').
-
-   `N'	is used for constants 0xffffnnnn or 0xnnnnffff
-
-   `O'	is a 5-bit zero-extended integer.  */
-
-#define CONST_OK_FOR_LETTER_P(VALUE, C)					\
-  ((C) == 'I' ? ((unsigned HOST_WIDE_INT) ((VALUE) + 0x8000) < 0x10000)	\
-   : (C) == 'J' ? ((VALUE) == 0)					\
-   : (C) == 'K' ? ((unsigned HOST_WIDE_INT) (VALUE) < 0x10000)		\
-   : (C) == 'L' ? (((VALUE) & 0x0000ffff) == 0				\
-		   && (((VALUE) & ~2147483647) == 0			\
-		       || ((VALUE) & ~2147483647) == ~2147483647))	\
-   : (C) == 'M' ? ((((VALUE) & ~0x0000ffff) != 0)			\
-		   && (((VALUE) & ~0x0000ffff) != ~0x0000ffff)		\
-		   && (((VALUE) & 0x0000ffff) != 0			\
-		       || (((VALUE) & ~2147483647) != 0			\
-			   && ((VALUE) & ~2147483647) != ~2147483647)))	\
-   : (C) == 'N' ? ((((VALUE) & 0xffff) == 0xffff)			\
-		   || (((VALUE) & 0xffff0000) == 0xffff0000))		\
-   : (C) == 'O' ? ((unsigned HOST_WIDE_INT) ((VALUE) + 0x20) < 0x40)	\
-   : 0)
-
-#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C)				\
-  ((C) == 'G'								\
-   && (VALUE) == CONST0_RTX (GET_MODE (VALUE)))
-
-/* `R' is for memory references which take 1 word for the instruction.  */
-
-#define EXTRA_CONSTRAINT(OP,CODE)					\
-  (((CODE) == 'R')	  ? simple_memory_operand (OP, GET_MODE (OP))	\
-   : FALSE)
-
 
 /* Basic Stack Layout.  */
 
diff --git a/gcc/config/iq2000/iq2000.md b/gcc/config/iq2000/iq2000.md
index b7856c1..7ad113d 100644
--- a/gcc/config/iq2000/iq2000.md
+++ b/gcc/config/iq2000/iq2000.md
@@ -194,6 +194,7 @@ 
    (nil)])
 
 (include "predicates.md")
+(include "constraints.md")
 
 
 ;; .........................
@@ -731,15 +732,15 @@ 
 ;; in FP registers (off by default, use -mdebugh to enable).
 
 (define_insn "movsi_internal2"
-  [(set (match_operand:SI 0 "nonimmediate_operand" "=d,d,d,d,d,d,R,m,*d,*z,*x,*d,*x,*d")
-	(match_operand:SI 1 "move_operand" "d,S,IKL,Mnis,R,m,dJ,dJ,*z,*d,J,*x,*d,*a"))]
+  [(set (match_operand:SI 0 "nonimmediate_operand" "=d,d,d,d,d,R,m")
+	(match_operand:SI 1 "move_operand" "d,IKL,Mnis,R,m,dJ,dJ"))]
   "(register_operand (operands[0], SImode)
        || register_operand (operands[1], SImode)
        || (GET_CODE (operands[1]) == CONST_INT && INTVAL (operands[1]) == 0))"
   "* return iq2000_move_1word (operands, insn, FALSE);"
-  [(set_attr "type"	"move,load,arith,arith,load,load,store,store,xfer,xfer,move,move,move,move")
+  [(set_attr "type"	"move,arith,arith,load,load,store,store")
    (set_attr "mode"	"SI")
-   (set_attr "length"	"4,8,4,8,8,8,4,8,4,4,4,4,4,4")])
+   (set_attr "length"	"4,4,8,8,8,4,8")])
 
 ;; 16-bit Integer moves
 
@@ -770,15 +771,15 @@ 
 ;; in FP registers (off by default, use -mdebugh to enable).
 
 (define_insn "movhi_internal2"
-  [(set (match_operand:HI 0 "nonimmediate_operand" "=d,d,d,d,R,m,*d,*z,*x,*d")
-	(match_operand:HI 1 "general_operand"       "d,IK,R,m,dJ,dJ,*z,*d,*d,*x"))]
+  [(set (match_operand:HI 0 "nonimmediate_operand" "=d,d,d,d,R,m")
+	(match_operand:HI 1 "general_operand"       "d,IK,R,m,dJ,dJ"))]
   "(register_operand (operands[0], HImode)
        || register_operand (operands[1], HImode)
        || (GET_CODE (operands[1]) == CONST_INT && INTVAL (operands[1]) == 0))"
   "* return iq2000_move_1word (operands, insn, TRUE);"
-  [(set_attr "type"	"move,arith,load,load,store,store,xfer,xfer,move,move")
+  [(set_attr "type"	"move,arith,load,load,store,store")
    (set_attr "mode"	"HI")
-   (set_attr "length"	"4,4,4,8,4,8,4,4,4,4")])
+   (set_attr "length"	"4,4,4,8,4,8")])
 
 ;; 8-bit Integer moves
 
@@ -809,15 +810,15 @@ 
 ;; in FP registers (off by default, use -mdebugh to enable).
 
 (define_insn "movqi_internal2"
-  [(set (match_operand:QI 0 "nonimmediate_operand" "=d,d,d,d,R,m,*d,*z,*x,*d")
-	(match_operand:QI 1 "general_operand"       "d,IK,R,m,dJ,dJ,*z,*d,*d,*x"))]
+  [(set (match_operand:QI 0 "nonimmediate_operand" "=d,d,d,d,R,m")
+	(match_operand:QI 1 "general_operand"       "d,IK,R,m,dJ,dJ"))]
   "(register_operand (operands[0], QImode)
        || register_operand (operands[1], QImode)
        || (GET_CODE (operands[1]) == CONST_INT && INTVAL (operands[1]) == 0))"
   "* return iq2000_move_1word (operands, insn, TRUE);"
-  [(set_attr "type"	"move,arith,load,load,store,store,xfer,xfer,move,move")
+  [(set_attr "type"	"move,arith,load,load,store,store")
    (set_attr "mode"	"QI")
-   (set_attr "length"	"4,4,4,8,4,8,4,4,4,4")])
+   (set_attr "length"	"4,4,4,8,4,8")])
 
 ;; 32-bit floating point moves
 
@@ -1271,15 +1272,6 @@ 
   [(set_attr "type"	"arith")
    (set_attr "mode"	"SI")])
 
-(define_insn ""
-  [(set (match_operand:SI 0 "register_operand" "=t")
-	(gtu:SI (match_operand:SI 1 "register_operand" "d")
-		(match_operand:SI 2 "register_operand" "d")))]
-  ""
-  "sltu\\t%2,%1"
-  [(set_attr "type"	"arith")
-   (set_attr "mode"	"SI")])
-
 (define_insn "sltu_si"
   [(set (match_operand:SI 0 "register_operand" "=d,=d")
 	(ltu:SI (match_operand:SI 1 "register_operand" "d,d")
@@ -1583,7 +1575,7 @@ 
 ;; calls.c now passes a fourth argument, make saber happy
 
 (define_expand "call_value"
-  [(parallel [(set (match_operand 0 "register_operand" "=df")
+  [(parallel [(set (match_operand 0 "register_operand" "=d")
 		   (call (match_operand 1 "memory_operand" "m")
 			 (match_operand 2 "" "i")))
 	      (clobber (reg:SI 31))
@@ -1649,8 +1641,8 @@ 
   "")
 
 (define_insn "call_value_internal1"
-  [(set (match_operand 0 "register_operand" "=df")
-        (call (mem (match_operand 1 "call_insn_operand" "ri"))
+  [(set (match_operand 0 "register_operand" "=d")
+        (call (mem (match_operand 1 "call_insn_operand" "r"))
               (match_operand 2 "" "i")))
    (clobber (match_operand:SI 3 "register_operand" "=d"))]
   ""
@@ -1683,10 +1675,10 @@ 
 ;; return values.
 
 (define_insn "call_value_multiple_internal1"
-  [(set (match_operand 0 "register_operand" "=df")
-        (call (mem (match_operand 1 "call_insn_operand" "ri"))
+  [(set (match_operand 0 "register_operand" "=d")
+        (call (mem (match_operand 1 "call_insn_operand" "r"))
               (match_operand 2 "" "i")))
-   (set (match_operand 3 "register_operand" "=df")
+   (set (match_operand 3 "register_operand" "=d")
    	(call (mem (match_dup 1))
               (match_dup 2)))
   (clobber (match_operand:SI 4 "register_operand" "=d"))]