From patchwork Tue Feb 15 10:49:15 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: [2/3] target-arm: Fix soft interrupt in GIC distributor From: Adam Lackorzynski X-Patchwork-Id: 83232 Message-Id: <20110215104915.GC19666@os.inf.tu-dresden.de> To: qemu-devel@nongnu.org Date: Tue, 15 Feb 2011 11:49:15 +0100 Fix selection of target list filter mode. Signed-off-by: Adam Lackorzynski Reviewed-by: Peter Maydell --- hw/arm_gic.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/arm_gic.c b/hw/arm_gic.c index e6b1953..0e934ec 100644 --- a/hw/arm_gic.c +++ b/hw/arm_gic.c @@ -549,10 +549,10 @@ static void gic_dist_writel(void *opaque, target_phys_addr_t offset, mask = (value >> 16) & ALL_CPU_MASK; break; case 1: - mask = 1 << cpu; + mask = ALL_CPU_MASK ^ (1 << cpu); break; case 2: - mask = ALL_CPU_MASK ^ (1 << cpu); + mask = 1 << cpu; break; default: DPRINTF("Bad Soft Int target filter\n");