From patchwork Tue Oct 31 10:28:44 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "J, KEERTHY" X-Patchwork-Id: 832314 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="KY+dyQ5O"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3yR7060CpWz9sQl for ; Tue, 31 Oct 2017 21:30:14 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752550AbdJaKaN (ORCPT ); Tue, 31 Oct 2017 06:30:13 -0400 Received: from lelnx193.ext.ti.com ([198.47.27.77]:43000 "EHLO lelnx193.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752209AbdJaKaM (ORCPT ); Tue, 31 Oct 2017 06:30:12 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id v9VATRxE020960; Tue, 31 Oct 2017 05:29:27 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1509445767; bh=UQaRLo1cUqjNTyJN4feyjXS3AkTfnbwynYwY4un3D8A=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=KY+dyQ5OlPodUlbewd2Tcu4yPqrVGdPE9YsV70aXoj7YpWwQIeyqL1eKKYKLDOvIH Ao1iesCpjfrk4bOUuADbV2wEVA7HBJLI4HLTtpknkfjor6tfF4GkyOqRatCTZYqCVV DMev6AmGfi3K0zKjE6z9jA1TzDFecTJ3g1XZnzhM= Received: from DLEE105.ent.ti.com (dlee105.ent.ti.com [157.170.170.35]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id v9VATRM2015891; Tue, 31 Oct 2017 05:29:27 -0500 Received: from DLEE104.ent.ti.com (157.170.170.34) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34; Tue, 31 Oct 2017 05:29:27 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend Transport; Tue, 31 Oct 2017 05:29:27 -0500 Received: from ula0393675.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v9VAT8mT002203; Tue, 31 Oct 2017 05:29:24 -0500 From: Keerthy To: , , , CC: , , , , , Subject: [PATCH 5/7] clocksource: dmtimer: Populate the timer ops to the pdata Date: Tue, 31 Oct 2017 15:58:44 +0530 Message-ID: <1509445726-21040-6-git-send-email-j-keerthy@ti.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1509445726-21040-1-git-send-email-j-keerthy@ti.com> References: <1509445726-21040-1-git-send-email-j-keerthy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org Add the timer ops to the platform data Signed-off-by: Keerthy --- drivers/clocksource/dmtimer.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/drivers/clocksource/dmtimer.c b/drivers/clocksource/dmtimer.c index afe1dc9..1cbd954 100644 --- a/drivers/clocksource/dmtimer.c +++ b/drivers/clocksource/dmtimer.c @@ -922,8 +922,33 @@ static int omap_dm_timer_remove(struct platform_device *pdev) return ret; } +static struct omap_dm_timer_ops dmtimer_ops = { + .request_by_node = omap_dm_timer_request_by_node, + .request_specific = omap_dm_timer_request_specific, + .request = omap_dm_timer_request, + .set_source = omap_dm_timer_set_source, + .get_irq = omap_dm_timer_get_irq, + .set_int_enable = omap_dm_timer_set_int_enable, + .set_int_disable = omap_dm_timer_set_int_disable, + .free = omap_dm_timer_free, + .enable = omap_dm_timer_enable, + .disable = omap_dm_timer_disable, + .get_fclk = omap_dm_timer_get_fclk, + .start = omap_dm_timer_start, + .stop = omap_dm_timer_stop, + .set_load = omap_dm_timer_set_load, + .set_match = omap_dm_timer_set_match, + .set_pwm = omap_dm_timer_set_pwm, + .set_prescaler = omap_dm_timer_set_prescaler, + .read_counter = omap_dm_timer_read_counter, + .write_counter = omap_dm_timer_write_counter, + .read_status = omap_dm_timer_read_status, + .write_status = omap_dm_timer_write_status, +}; + static const struct dmtimer_platform_data omap3plus_pdata = { .timer_errata = OMAP_TIMER_ERRATA_I103_I767, + .timer_ops = &dmtimer_ops, }; static const struct of_device_id omap_timer_match[] = {