| Message ID | 20171029210858.2956-1-benoit.thebaudeau.dev@gmail.com |
|---|---|
| State | Accepted |
| Commit | bcfb36537552441faeceb6b0089ab40a29b9dff3 |
| Delegated to: | Stefano Babic |
| Headers | show |
| Series | [U-Boot] mmc: fsl_esdhc: Fix PIO timeout | expand |
On Sun, Oct 29, 2017 at 7:08 PM, Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com> wrote: > The following error has been observed on i.MX25 with a high-speed SDSC > card: > Data Write Failed in PIO Mode. > > It was caused by the timeout set on PRSSTAT.BWEN, which was triggered > because this bit takes 15 ms to be set after writing the first block to > DATPORT with this card. Without this timeout, all the blocks are > properly written. > > This timeout was implemented by decrementing a variable, so it was > depending on the CPU frequency. Fix this issue by setting this timeout > to a long enough absolute duration (500 ms). > > Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com> > Cc: Stefano Babic <sbabic@denx.de> > Cc: Fabio Estevam <fabio.estevam@nxp.com> > Cc: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
On Mon, Oct 30, 2017 at 2:38 AM, Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com> wrote: > The following error has been observed on i.MX25 with a high-speed SDSC > card: > Data Write Failed in PIO Mode. > > It was caused by the timeout set on PRSSTAT.BWEN, which was triggered > because this bit takes 15 ms to be set after writing the first block to > DATPORT with this card. Without this timeout, all the blocks are > properly written. > > This timeout was implemented by decrementing a variable, so it was > depending on the CPU frequency. Fix this issue by setting this timeout > to a long enough absolute duration (500 ms). > > Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com> > Cc: Stefano Babic <sbabic@denx.de> > Cc: Fabio Estevam <fabio.estevam@nxp.com> > Cc: Jaehoon Chung <jh80.chung@samsung.com> > --- > drivers/mmc/fsl_esdhc.c | 26 +++++++++++++------------- > include/fsl_esdhc.h | 2 +- > 2 files changed, 14 insertions(+), 14 deletions(-) > > diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c > index cc188c4260..499d622c6d 100644 > --- a/drivers/mmc/fsl_esdhc.c > +++ b/drivers/mmc/fsl_esdhc.c > @@ -171,20 +171,20 @@ static void esdhc_pio_read_write(struct fsl_esdhc_priv *priv, > uint databuf; > uint size; > uint irqstat; > - uint timeout; > + ulong start; > > if (data->flags & MMC_DATA_READ) { > blocks = data->blocks; > buffer = data->dest; > while (blocks) { > - timeout = PIO_TIMEOUT; > + start = get_timer(0); > size = data->blocksize; > irqstat = esdhc_read32(®s->irqstat); > - while (!(esdhc_read32(®s->prsstat) & PRSSTAT_BREN) > - && --timeout); > - if (timeout <= 0) { > - printf("\nData Read Failed in PIO Mode."); > - return; > + while (!(esdhc_read32(®s->prsstat) & PRSSTAT_BREN)) { > + if (get_timer(start) > PIO_TIMEOUT) { > + printf("\nData Read Failed in PIO Mode."); > + return; > + } How about using wait_for_bit here? thanks!
On Tue, Oct 31, 2017 at 4:18 PM, Jagan Teki <jagannadh.teki@gmail.com> wrote: > On Mon, Oct 30, 2017 at 2:38 AM, Benoît Thébaudeau > <benoit.thebaudeau.dev@gmail.com> wrote: >> The following error has been observed on i.MX25 with a high-speed SDSC >> card: >> Data Write Failed in PIO Mode. >> >> It was caused by the timeout set on PRSSTAT.BWEN, which was triggered >> because this bit takes 15 ms to be set after writing the first block to >> DATPORT with this card. Without this timeout, all the blocks are >> properly written. >> >> This timeout was implemented by decrementing a variable, so it was >> depending on the CPU frequency. Fix this issue by setting this timeout >> to a long enough absolute duration (500 ms). >> >> Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com> >> Cc: Stefano Babic <sbabic@denx.de> >> Cc: Fabio Estevam <fabio.estevam@nxp.com> >> Cc: Jaehoon Chung <jh80.chung@samsung.com> >> --- >> drivers/mmc/fsl_esdhc.c | 26 +++++++++++++------------- >> include/fsl_esdhc.h | 2 +- >> 2 files changed, 14 insertions(+), 14 deletions(-) >> >> diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c >> index cc188c4260..499d622c6d 100644 >> --- a/drivers/mmc/fsl_esdhc.c >> +++ b/drivers/mmc/fsl_esdhc.c >> @@ -171,20 +171,20 @@ static void esdhc_pio_read_write(struct fsl_esdhc_priv *priv, >> uint databuf; >> uint size; >> uint irqstat; >> - uint timeout; >> + ulong start; >> >> if (data->flags & MMC_DATA_READ) { >> blocks = data->blocks; >> buffer = data->dest; >> while (blocks) { >> - timeout = PIO_TIMEOUT; >> + start = get_timer(0); >> size = data->blocksize; >> irqstat = esdhc_read32(®s->irqstat); >> - while (!(esdhc_read32(®s->prsstat) & PRSSTAT_BREN) >> - && --timeout); >> - if (timeout <= 0) { >> - printf("\nData Read Failed in PIO Mode."); >> - return; >> + while (!(esdhc_read32(®s->prsstat) & PRSSTAT_BREN)) { >> + if (get_timer(start) > PIO_TIMEOUT) { >> + printf("\nData Read Failed in PIO Mode."); >> + return; >> + } > > How about using wait_for_bit here? wait_for_bit() uses readl(), whereas here esdhc_read32() is used in order to take the IP vs. CPU endianness compatibility issues into account. Best regards, Benoît
On Wed, Nov 1, 2017 at 2:05 AM, Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com> wrote: > On Tue, Oct 31, 2017 at 4:18 PM, Jagan Teki <jagannadh.teki@gmail.com> wrote: >> On Mon, Oct 30, 2017 at 2:38 AM, Benoît Thébaudeau >> <benoit.thebaudeau.dev@gmail.com> wrote: >>> The following error has been observed on i.MX25 with a high-speed SDSC >>> card: >>> Data Write Failed in PIO Mode. >>> >>> It was caused by the timeout set on PRSSTAT.BWEN, which was triggered >>> because this bit takes 15 ms to be set after writing the first block to >>> DATPORT with this card. Without this timeout, all the blocks are >>> properly written. >>> >>> This timeout was implemented by decrementing a variable, so it was >>> depending on the CPU frequency. Fix this issue by setting this timeout >>> to a long enough absolute duration (500 ms). >>> >>> Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com> >>> Cc: Stefano Babic <sbabic@denx.de> >>> Cc: Fabio Estevam <fabio.estevam@nxp.com> >>> Cc: Jaehoon Chung <jh80.chung@samsung.com> >>> --- >>> drivers/mmc/fsl_esdhc.c | 26 +++++++++++++------------- >>> include/fsl_esdhc.h | 2 +- >>> 2 files changed, 14 insertions(+), 14 deletions(-) >>> >>> diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c >>> index cc188c4260..499d622c6d 100644 >>> --- a/drivers/mmc/fsl_esdhc.c >>> +++ b/drivers/mmc/fsl_esdhc.c >>> @@ -171,20 +171,20 @@ static void esdhc_pio_read_write(struct fsl_esdhc_priv *priv, >>> uint databuf; >>> uint size; >>> uint irqstat; >>> - uint timeout; >>> + ulong start; >>> >>> if (data->flags & MMC_DATA_READ) { >>> blocks = data->blocks; >>> buffer = data->dest; >>> while (blocks) { >>> - timeout = PIO_TIMEOUT; >>> + start = get_timer(0); >>> size = data->blocksize; >>> irqstat = esdhc_read32(®s->irqstat); >>> - while (!(esdhc_read32(®s->prsstat) & PRSSTAT_BREN) >>> - && --timeout); >>> - if (timeout <= 0) { >>> - printf("\nData Read Failed in PIO Mode."); >>> - return; >>> + while (!(esdhc_read32(®s->prsstat) & PRSSTAT_BREN)) { >>> + if (get_timer(start) > PIO_TIMEOUT) { >>> + printf("\nData Read Failed in PIO Mode."); >>> + return; >>> + } >> >> How about using wait_for_bit here? > > wait_for_bit() uses readl(), whereas here esdhc_read32() is used in > order to take the IP vs. CPU endianness compatibility issues into > account. Reviewed-by: Jagan Teki <jagan@openedev.com> thanks!
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index cc188c4260..499d622c6d 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -171,20 +171,20 @@ static void esdhc_pio_read_write(struct fsl_esdhc_priv *priv, uint databuf; uint size; uint irqstat; - uint timeout; + ulong start; if (data->flags & MMC_DATA_READ) { blocks = data->blocks; buffer = data->dest; while (blocks) { - timeout = PIO_TIMEOUT; + start = get_timer(0); size = data->blocksize; irqstat = esdhc_read32(®s->irqstat); - while (!(esdhc_read32(®s->prsstat) & PRSSTAT_BREN) - && --timeout); - if (timeout <= 0) { - printf("\nData Read Failed in PIO Mode."); - return; + while (!(esdhc_read32(®s->prsstat) & PRSSTAT_BREN)) { + if (get_timer(start) > PIO_TIMEOUT) { + printf("\nData Read Failed in PIO Mode."); + return; + } } while (size && (!(irqstat & IRQSTAT_TC))) { udelay(100); /* Wait before last byte transfer complete */ @@ -200,14 +200,14 @@ static void esdhc_pio_read_write(struct fsl_esdhc_priv *priv, blocks = data->blocks; buffer = (char *)data->src; while (blocks) { - timeout = PIO_TIMEOUT; + start = get_timer(0); size = data->blocksize; irqstat = esdhc_read32(®s->irqstat); - while (!(esdhc_read32(®s->prsstat) & PRSSTAT_BWEN) - && --timeout); - if (timeout <= 0) { - printf("\nData Write Failed in PIO Mode."); - return; + while (!(esdhc_read32(®s->prsstat) & PRSSTAT_BWEN)) { + if (get_timer(start) > PIO_TIMEOUT) { + printf("\nData Write Failed in PIO Mode."); + return; + } } while (size && (!(irqstat & IRQSTAT_TC))) { udelay(100); /* Wait before last byte transfer complete */ diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h index 02b362d5e3..de1f5e7d9f 100644 --- a/include/fsl_esdhc.h +++ b/include/fsl_esdhc.h @@ -130,7 +130,7 @@ #define XFERTYP_DMAEN 0x00000001 #define CINS_TIMEOUT 1000 -#define PIO_TIMEOUT 100000 +#define PIO_TIMEOUT 500 #define DSADDR 0x2e004
The following error has been observed on i.MX25 with a high-speed SDSC card: Data Write Failed in PIO Mode. It was caused by the timeout set on PRSSTAT.BWEN, which was triggered because this bit takes 15 ms to be set after writing the first block to DATPORT with this card. Without this timeout, all the blocks are properly written. This timeout was implemented by decrementing a variable, so it was depending on the CPU frequency. Fix this issue by setting this timeout to a long enough absolute duration (500 ms). Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> --- drivers/mmc/fsl_esdhc.c | 26 +++++++++++++------------- include/fsl_esdhc.h | 2 +- 2 files changed, 14 insertions(+), 14 deletions(-)