From patchwork Sat Oct 28 13:37:17 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 831608 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="gYJge6W5"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3yPMN93gVbz9s81 for ; Sun, 29 Oct 2017 00:41:29 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751294AbdJ1Nl2 (ORCPT ); Sat, 28 Oct 2017 09:41:28 -0400 Received: from mail-lf0-f66.google.com ([209.85.215.66]:46787 "EHLO mail-lf0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751278AbdJ1Nl1 (ORCPT ); Sat, 28 Oct 2017 09:41:27 -0400 Received: by mail-lf0-f66.google.com with SMTP id g70so10126649lfl.3 for ; Sat, 28 Oct 2017 06:41:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=UVo0QebRsSOURoAbublqOPEkI+7XjFOVjwgiYuqlKzk=; b=gYJge6W5+vnu8BKivIlwS61g7TuHviRRgOV3d//91g4Hm3ctlpE5aEddfbLHA2X767 dgV6cjtYvmbPYoq755t233lqSZK/u0RlMpjlrfLKufpRGMackyy/yJQdwaDeesbsmlvW wXrbNlAB6M+8VadjtiUEa8bRHbtzR496Cmczk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=UVo0QebRsSOURoAbublqOPEkI+7XjFOVjwgiYuqlKzk=; b=Ov1jymHd+d3doBHjtoQdhjXk512WxrLBO93gtJvy+QnL3Ir371Eh+R47cIQFyUCw4S s7DxhN9hEscfnzDyHTr8QyKzM4v6bH4sx3vSunTV+xCTMNOApxRMqZG3ocBc8rlgxGpT FA8mpxor85rnEwaKQBzq3gjlJlfOvHDI1LRGfJTZg/R60QJJs9eTqf7wB+swOS4/e4eK UUqbO62qEFQhgdQrBfMEl26GBGLYgZ32q0U9BDwlSwM32egXF6IUp51KIqfUI+Dkcgq4 ByFVBHSR85Eve0XtKJEYCMSNqcXHAwb9nxeC4JX9xjfwyAI3FKK8qzK36EvPBQKwNzMo HRzQ== X-Gm-Message-State: AMCzsaVRZM7Nfinva7lCTRq5IYcXir+PPd/3SzojHGfsz/m8H0MmHpXo Oyv9Z14QD+abzlcZZL9HVaTt42K898U= X-Google-Smtp-Source: ABhQp+RdhcBXbCpNIcdDAmPDP2PRz7+v5jNJQB2psOq4hhszuKXPOL/IV3EXVY2H2YG9PXgLsJS+ow== X-Received: by 10.25.44.1 with SMTP id s1mr1382532lfs.117.1509198085890; Sat, 28 Oct 2017 06:41:25 -0700 (PDT) Received: from localhost.localdomain (c-567171d5.014-348-6c756e10.cust.bredbandsbolaget.se. [213.113.113.86]) by smtp.gmail.com with ESMTPSA id r23sm2447913lja.32.2017.10.28.06.41.24 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sat, 28 Oct 2017 06:41:25 -0700 (PDT) From: Linus Walleij To: linux-gpio@vger.kernel.org, Hans Ulli Kroll , Florian Fainelli Cc: Janos Laube , Paulius Zaleckas , linux-arm-kernel@lists.infradead.org, Linus Walleij , devicetree@vger.kernel.org Subject: [PATCH 2/4] pinctrl: Add skew-delay pin config and bindings Date: Sat, 28 Oct 2017 15:37:17 +0200 Message-Id: <20171028133719.27528-2-linus.walleij@linaro.org> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20171028133719.27528-1-linus.walleij@linaro.org> References: <20171028133719.27528-1-linus.walleij@linaro.org> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Some pin controllers (such as the Gemini) can control the expected clock skew and output delay on certain pins with a sub-nanosecond granularity. This is typically done by shunting in a number of double inverters in front of or behind the pin. Make it possible to configure this with a generic binding. Cc: devicetree@vger.kernel.org Signed-off-by: Linus Walleij Acked-by: Hans Ulli Kroll Acked-by: Rob Herring --- Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt | 4 ++++ drivers/pinctrl/pinconf-generic.c | 2 ++ include/linux/pinctrl/pinconf-generic.h | 5 +++++ 3 files changed, 11 insertions(+) diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt index 4483cc31e531..ad9bbbba36e9 100644 --- a/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt +++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt @@ -271,6 +271,10 @@ output-high - set the pin to output mode with high level sleep-hardware-state - indicate this is sleep related state which will be programmed into the registers for the sleep state. slew-rate - set the slew rate +skew-delay - this affects the expected clock skew on input pins + and the delay before latching a value to an output + pin. Typically indicates how many double-inverters are + used to delay the signal. For example: diff --git a/drivers/pinctrl/pinconf-generic.c b/drivers/pinctrl/pinconf-generic.c index 8eaa25c3384f..b4f7f8a458ea 100644 --- a/drivers/pinctrl/pinconf-generic.c +++ b/drivers/pinctrl/pinconf-generic.c @@ -49,6 +49,7 @@ static const struct pin_config_item conf_items[] = { PCONFDUMP(PIN_CONFIG_POWER_SOURCE, "pin power source", "selector", true), PCONFDUMP(PIN_CONFIG_SLEEP_HARDWARE_STATE, "sleep hardware state", NULL, false), PCONFDUMP(PIN_CONFIG_SLEW_RATE, "slew rate", NULL, true), + PCONFDUMP(PIN_CONFIG_SKEW_DELAY, "skew delay", NULL, true), }; static void pinconf_generic_dump_one(struct pinctrl_dev *pctldev, @@ -181,6 +182,7 @@ static const struct pinconf_generic_params dt_params[] = { { "power-source", PIN_CONFIG_POWER_SOURCE, 0 }, { "sleep-hardware-state", PIN_CONFIG_SLEEP_HARDWARE_STATE, 0 }, { "slew-rate", PIN_CONFIG_SLEW_RATE, 0 }, + { "skew-delay", PIN_CONFIG_SKEW_DELAY, 0 }, }; /** diff --git a/include/linux/pinctrl/pinconf-generic.h b/include/linux/pinctrl/pinconf-generic.h index 5d8bc7f21c2a..ec6dadcc1fde 100644 --- a/include/linux/pinctrl/pinconf-generic.h +++ b/include/linux/pinctrl/pinconf-generic.h @@ -90,6 +90,10 @@ * @PIN_CONFIG_SLEW_RATE: if the pin can select slew rate, the argument to * this parameter (on a custom format) tells the driver which alternative * slew rate to use. + * @PIN_CONFIG_SKEW_DELAY: if the pin has programmable skew rate (on inputs) + * or latch delay (on outputs) this parameter (in a custom format) + * specifies the clock skew or latch delay. It typically controls how + * many double inverters are put in front of the line. * @PIN_CONFIG_END: this is the last enumerator for pin configurations, if * you need to pass in custom configurations to the pin controller, use * PIN_CONFIG_END+1 as the base offset. @@ -117,6 +121,7 @@ enum pin_config_param { PIN_CONFIG_POWER_SOURCE, PIN_CONFIG_SLEEP_HARDWARE_STATE, PIN_CONFIG_SLEW_RATE, + PIN_CONFIG_SKEW_DELAY, PIN_CONFIG_END = 0x7F, PIN_CONFIG_MAX = 0xFF, };