| Message ID | 8ce696bc2b4b1808f6c7f7a967a3dacd954d2a4e.1508448293.git.digetx@gmail.com |
|---|---|
| State | Deferred |
| Headers | show |
| Series | NVIDIA Tegra20 video decoder driver | expand |
Hi Dmitry, On 10/20/2017 12:34 AM, Dmitry Osipenko wrote: > From: Vladimir Zapolskiy <vz@mleia.com> > > All Tegra SoCs contain 256KiB IRAM, which is used to store CPU resume code > and by hardware engines like a video decoder. > > Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Please add also your own closing "Signed-off-by" tag, please reference to "Developer's Certificate of Origin 1.1", point (c), it is found in Documentation/process/submitting-patches.rst > --- > arch/arm/boot/dts/tegra114.dtsi | 8 ++++++++ > arch/arm/boot/dts/tegra124.dtsi | 8 ++++++++ > arch/arm/boot/dts/tegra20.dtsi | 8 ++++++++ > arch/arm/boot/dts/tegra30.dtsi | 8 ++++++++ My assumption is that Thierry would prefer to get 4 separate patches, one for each platform, please split the patch. Also thanks for your time and your efforts applied to push my occasional change, please feel free to take your own authorship for 3 out of 4 patches. > 4 files changed, 32 insertions(+) > > diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi > index 8932ea3afd5f..13f6087790c8 100644 > --- a/arch/arm/boot/dts/tegra114.dtsi > +++ b/arch/arm/boot/dts/tegra114.dtsi > @@ -10,6 +10,14 @@ > compatible = "nvidia,tegra114"; > interrupt-parent = <&lic>; > > + iram@40000000 { > + compatible = "mmio-sram"; Unfortunately Thierry hasn't yet replied, but my assumption is that the list of compatibles should be extended with one more SoC specific value like compatible = "nvidia,tegra114-sysram", "mmio-sram"; I'm not sure, if Tegra maintainers want to see a new compatible described in Documentation/devicetree/bindings. > + reg = <0x40000000 0x40000>; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges = <0 0x40000000 0x40000>; > + }; > + > host1x@50000000 { > compatible = "nvidia,tegra114-host1x", "simple-bus"; > reg = <0x50000000 0x00028000>; > diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi > index 8baf00b89efb..a3585ed82646 100644 > --- a/arch/arm/boot/dts/tegra124.dtsi > +++ b/arch/arm/boot/dts/tegra124.dtsi The considerations from above are applicable to the rest of the touched platforms. -- With best wishes, Vladimir -- To unsubscribe from this list: send the line "unsubscribe linux-tegra" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On 11.11.2017 17:18, Vladimir Zapolskiy wrote: > Hi Dmitry, > > On 10/20/2017 12:34 AM, Dmitry Osipenko wrote: >> From: Vladimir Zapolskiy <vz@mleia.com> >> >> All Tegra SoCs contain 256KiB IRAM, which is used to store CPU resume code >> and by hardware engines like a video decoder. >> >> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> > > Please add also your own closing "Signed-off-by" tag, please reference > to "Developer's Certificate of Origin 1.1", point (c), it is found in > Documentation/process/submitting-patches.rst > Indeed, thanks! >> --- >> arch/arm/boot/dts/tegra114.dtsi | 8 ++++++++ >> arch/arm/boot/dts/tegra124.dtsi | 8 ++++++++ >> arch/arm/boot/dts/tegra20.dtsi | 8 ++++++++ >> arch/arm/boot/dts/tegra30.dtsi | 8 ++++++++ > > My assumption is that Thierry would prefer to get 4 separate patches, > one for each platform, please split the patch. > Thierry, would you? > Also thanks for your time and your efforts applied to push my occasional > change, please feel free to take your own authorship for 3 out of 4 patches. > Okay. >> 4 files changed, 32 insertions(+) >> >> diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi >> index 8932ea3afd5f..13f6087790c8 100644 >> --- a/arch/arm/boot/dts/tegra114.dtsi >> +++ b/arch/arm/boot/dts/tegra114.dtsi >> @@ -10,6 +10,14 @@ >> compatible = "nvidia,tegra114"; >> interrupt-parent = <&lic>; >> >> + iram@40000000 { >> + compatible = "mmio-sram"; > > Unfortunately Thierry hasn't yet replied, but my assumption is that > the list of compatibles should be extended with one more SoC specific > value like > > compatible = "nvidia,tegra114-sysram", "mmio-sram"; > > I'm not sure, if Tegra maintainers want to see a new compatible > described in Documentation/devicetree/bindings. > The custom compatible string shouldn't be needed. AFAIK, IRAM doesn't have any exposed controls, so just a generic "mmio-sram" suits well here. >> + reg = <0x40000000 0x40000>; >> + #address-cells = <1>; >> + #size-cells = <1>; >> + ranges = <0 0x40000000 0x40000>; >> + }; >> + >> host1x@50000000 { >> compatible = "nvidia,tegra114-host1x", "simple-bus"; >> reg = <0x50000000 0x00028000>; >> diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi >> index 8baf00b89efb..a3585ed82646 100644 >> --- a/arch/arm/boot/dts/tegra124.dtsi >> +++ b/arch/arm/boot/dts/tegra124.dtsi > > The considerations from above are applicable to the rest of > the touched platforms. -- To unsubscribe from this list: send the line "unsubscribe linux-tegra" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi index 8932ea3afd5f..13f6087790c8 100644 --- a/arch/arm/boot/dts/tegra114.dtsi +++ b/arch/arm/boot/dts/tegra114.dtsi @@ -10,6 +10,14 @@ compatible = "nvidia,tegra114"; interrupt-parent = <&lic>; + iram@40000000 { + compatible = "mmio-sram"; + reg = <0x40000000 0x40000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x40000000 0x40000>; + }; + host1x@50000000 { compatible = "nvidia,tegra114-host1x", "simple-bus"; reg = <0x50000000 0x00028000>; diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi index 8baf00b89efb..a3585ed82646 100644 --- a/arch/arm/boot/dts/tegra124.dtsi +++ b/arch/arm/boot/dts/tegra124.dtsi @@ -14,6 +14,14 @@ #address-cells = <2>; #size-cells = <2>; + iram@40000000 { + compatible = "mmio-sram"; + reg = <0x0 0x40000000 0x0 0x40000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x0 0x40000000 0x40000>; + }; + pcie@1003000 { compatible = "nvidia,tegra124-pcie"; device_type = "pci"; diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index 7c85f97f72ea..aaf32f96f1e8 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -9,6 +9,14 @@ compatible = "nvidia,tegra20"; interrupt-parent = <&lic>; + iram@40000000 { + compatible = "mmio-sram"; + reg = <0x40000000 0x40000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x40000000 0x40000>; + }; + host1x@50000000 { compatible = "nvidia,tegra20-host1x", "simple-bus"; reg = <0x50000000 0x00024000>; diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index 13960fda7471..3b447c64bf69 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -10,6 +10,14 @@ compatible = "nvidia,tegra30"; interrupt-parent = <&lic>; + iram@40000000 { + compatible = "mmio-sram"; + reg = <0x40000000 0x40000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x40000000 0x40000>; + }; + pcie@3000 { compatible = "nvidia,tegra30-pcie"; device_type = "pci";