| Message ID | 1508376060-29425-6-git-send-email-bmeng.cn@gmail.com |
|---|---|
| State | Accepted |
| Commit | ab20107468de5bf6b9affa93b17f2284cc838b5b |
| Delegated to: | Bin Meng |
| Headers | show |
| Series | [U-Boot,1/9] x86: galileo: Fix boot failure | expand |
On 19 October 2017 at 03:20, Bin Meng <bmeng.cn@gmail.com> wrote: > Some Intel FSP (like Braswell) does SPI lock-down during the call > to fsp_notify(INIT_PHASE_BOOT). But before SPI lock-down is done, > it's bootloader's responsibility to configure the SPI controller's > opcode registers properly otherwise SPI controller driver doesn't > know how to communicate with the SPI flash device. > > Rather than passively doing the opcode configuration, let's add a > simple DTS property "intel,spi-lock-down" and let the driver call > the opcode configuration function if required by such FSP. > > Signed-off-by: Bin Meng <bmeng.cn@gmail.com> > --- > > drivers/spi/ich.c | 22 ++++++++++++++++++++++ > drivers/spi/ich.h | 1 + > 2 files changed, 23 insertions(+) Does this go in a binding file somewhere? Reviewed-by: Simon Glass <sjg@chromium.org>
Hi Simon, On Sun, Oct 22, 2017 at 10:36 PM, Simon Glass <sjg@chromium.org> wrote: > On 19 October 2017 at 03:20, Bin Meng <bmeng.cn@gmail.com> wrote: >> Some Intel FSP (like Braswell) does SPI lock-down during the call >> to fsp_notify(INIT_PHASE_BOOT). But before SPI lock-down is done, >> it's bootloader's responsibility to configure the SPI controller's >> opcode registers properly otherwise SPI controller driver doesn't >> know how to communicate with the SPI flash device. >> >> Rather than passively doing the opcode configuration, let's add a >> simple DTS property "intel,spi-lock-down" and let the driver call >> the opcode configuration function if required by such FSP. >> >> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> >> --- >> >> drivers/spi/ich.c | 22 ++++++++++++++++++++++ >> drivers/spi/ich.h | 1 + >> 2 files changed, 23 insertions(+) > > Does this go in a binding file somewhere? > Looks there is no binding file for Intel SPI controller driver. We will need create one. > Reviewed-by: Simon Glass <sjg@chromium.org> Regards, Bin
On Mon, Oct 23, 2017 at 9:32 AM, Bin Meng <bmeng.cn@gmail.com> wrote: > Hi Simon, > > On Sun, Oct 22, 2017 at 10:36 PM, Simon Glass <sjg@chromium.org> wrote: >> On 19 October 2017 at 03:20, Bin Meng <bmeng.cn@gmail.com> wrote: >>> Some Intel FSP (like Braswell) does SPI lock-down during the call >>> to fsp_notify(INIT_PHASE_BOOT). But before SPI lock-down is done, >>> it's bootloader's responsibility to configure the SPI controller's >>> opcode registers properly otherwise SPI controller driver doesn't >>> know how to communicate with the SPI flash device. >>> >>> Rather than passively doing the opcode configuration, let's add a >>> simple DTS property "intel,spi-lock-down" and let the driver call >>> the opcode configuration function if required by such FSP. >>> >>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> >>> --- >>> >>> drivers/spi/ich.c | 22 ++++++++++++++++++++++ >>> drivers/spi/ich.h | 1 + >>> 2 files changed, 23 insertions(+) >> >> Does this go in a binding file somewhere? >> > > Looks there is no binding file for Intel SPI controller driver. We > will need create one. > >> Reviewed-by: Simon Glass <sjg@chromium.org> > applied to u-boot-x86, thanks!
diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c index 22fc83d..927bbd7 100644 --- a/drivers/spi/ich.c +++ b/drivers/spi/ich.c @@ -184,6 +184,19 @@ static inline void spi_use_in(struct spi_trans *trans, unsigned bytes) trans->bytesin -= bytes; } +static void spi_lock_down(struct ich_spi_platdata *plat, void *sbase) +{ + if (plat->ich_version == ICHV_7) { + struct ich7_spi_regs *ich7_spi = sbase; + + setbits_le16(&ich7_spi->spis, SPIS_LOCK); + } else if (plat->ich_version == ICHV_9) { + struct ich9_spi_regs *ich9_spi = sbase; + + setbits_le16(&ich9_spi->hsfs, HSFS_FLOCKDN); + } +} + static bool spi_lock_status(struct ich_spi_platdata *plat, void *sbase) { int lock = 0; @@ -592,6 +605,12 @@ static int ich_spi_probe(struct udevice *dev) return ret; } + /* Lock down SPI controller settings if required */ + if (plat->lockdown) { + ich_spi_config_opcode(dev); + spi_lock_down(plat, priv->base); + } + priv->cur_speed = priv->max_speed; return 0; @@ -662,6 +681,9 @@ static int ich_spi_ofdata_to_platdata(struct udevice *dev) plat->ich_version = ICHV_9; } + plat->lockdown = fdtdec_get_bool(gd->fdt_blob, node, + "intel,spi-lock-down"); + return ret; } diff --git a/drivers/spi/ich.h b/drivers/spi/ich.h index c867c57..06b7fb9 100644 --- a/drivers/spi/ich.h +++ b/drivers/spi/ich.h @@ -174,6 +174,7 @@ enum ich_version { struct ich_spi_platdata { enum ich_version ich_version; /* Controller version, 7 or 9 */ + bool lockdown; /* lock down controller settings? */ }; struct ich_spi_priv {
Some Intel FSP (like Braswell) does SPI lock-down during the call to fsp_notify(INIT_PHASE_BOOT). But before SPI lock-down is done, it's bootloader's responsibility to configure the SPI controller's opcode registers properly otherwise SPI controller driver doesn't know how to communicate with the SPI flash device. Rather than passively doing the opcode configuration, let's add a simple DTS property "intel,spi-lock-down" and let the driver call the opcode configuration function if required by such FSP. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> --- drivers/spi/ich.c | 22 ++++++++++++++++++++++ drivers/spi/ich.h | 1 + 2 files changed, 23 insertions(+)