From patchwork Thu Feb 10 23:12:07 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Walle X-Patchwork-Id: 82685 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 62BD9B7128 for ; Fri, 11 Feb 2011 10:16:25 +1100 (EST) Received: from localhost ([127.0.0.1]:41035 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PnfkM-0004KH-7H for incoming@patchwork.ozlabs.org; Thu, 10 Feb 2011 18:16:22 -0500 Received: from [140.186.70.92] (port=41251 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Pnfgq-0002kd-RP for qemu-devel@nongnu.org; Thu, 10 Feb 2011 18:12:52 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Pnfgo-0003fw-Rc for qemu-devel@nongnu.org; Thu, 10 Feb 2011 18:12:44 -0500 Received: from mail.serverraum.org ([78.47.150.89]:54609) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Pnfgo-0003fN-Cp for qemu-devel@nongnu.org; Thu, 10 Feb 2011 18:12:42 -0500 Received: from localhost (localhost [127.0.0.1]) by mail.serverraum.org (Postfix) with ESMTP id 281373EF08; Fri, 11 Feb 2011 00:12:42 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at mail.serverraum.org Received: from mail.serverraum.org ([127.0.0.1]) by localhost (web.serverraum.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id UO7dzouECYju; Fri, 11 Feb 2011 00:12:42 +0100 (CET) Received: from thanatos.fritz.box (91-66-128-56-dynip.superkabel.de [91.66.128.56]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.serverraum.org (Postfix) with ESMTPSA id A7CB43EF07; Fri, 11 Feb 2011 00:12:41 +0100 (CET) From: Michael Walle To: qemu-devel@nongnu.org Date: Fri, 11 Feb 2011 00:12:07 +0100 Message-Id: <1297379530-23487-15-git-send-email-michael@walle.cc> X-Mailer: git-send-email 1.7.2.3 In-Reply-To: <1297379530-23487-1-git-send-email-michael@walle.cc> References: <1297379530-23487-1-git-send-email-michael@walle.cc> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) X-Received-From: 78.47.150.89 Cc: "Edgar E. Iglesias" , Michael Walle , Alexander Graf , Richard Henderson Subject: [Qemu-devel] [PATCH 14/17] lm32: todo and documentation X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This patch adds general target documentation and a todo list. Signed-off-by: Michael Walle --- target-lm32/README | 46 ++++++++++++++++++++++++++++++++++++++++++++++ target-lm32/TODO | 3 +++ 2 files changed, 49 insertions(+), 0 deletions(-) create mode 100644 target-lm32/README create mode 100644 target-lm32/TODO diff --git a/target-lm32/README b/target-lm32/README new file mode 100644 index 0000000..a1c2c7e --- /dev/null +++ b/target-lm32/README @@ -0,0 +1,46 @@ +LatticeMico32 target +-------------------- + +General +------- +All opcodes including the JUART CSRs are supported. + + +JTAG UART +--------- +JTAG UART is routed to a serial console device. For the current boards it +is the second one. Ie to enable it in the qemu virtual console window use +the following command line parameters: + -serial vc -serial vc +This will make serial0 (the lm32_uart) and serial1 (the JTAG UART) +available as virtual consoles. + + +Programmatically terminate the emulator +---------------------------------------- +Originally neither the LatticeMico32 nor its peripherals support a +mechanism to shut down the machine. Emulation aware programs can write to a +to a special register within the system control block to shut down the +virtual machine. For more details see hw/lm32_sys.c. The lm32-evr is the +first BSP which instantiate this model. A (32 bit) write to 0xfff0000 +causes a vm shutdown. + + +Special instructions +-------------------- +The translation recognizes one special instruction to halt the cpu: + and r0, r0, r0 +On real hardware this instruction is a nop. It is not used by GCC and +should (hopefully) not be used within hand-crafted assembly. +Insert this instruction in your idle loop to reduce the cpu load on the +host. + + +Ignoring the MSB of the address bus +----------------------------------- +Some SoC ignores the MSB on the address bus. Thus creating a shadow memory +area. As a general rule, 0x00000000-0x7fffffff is cached, whereas +0x80000000-0xffffffff is not cached and used to access IO devices. This +behaviour can be enabled with: + cpu_lm32_set_phys_msb_ignore(env, 1); + diff --git a/target-lm32/TODO b/target-lm32/TODO new file mode 100644 index 0000000..b9ea0c8 --- /dev/null +++ b/target-lm32/TODO @@ -0,0 +1,3 @@ +* disassembler (lm32-dis.c) +* linux-user emulation +* native bp/wp emulation (?)