| Message ID | 20110210081901.GV30899@tyan-ft48-01.lab.bos.redhat.com |
|---|---|
| State | New |
| Headers | show |
On Thu, Feb 10, 2011 at 9:19 AM, Jakub Jelinek <jakub@redhat.com> wrote: > Hi! > > On the attached testcase GCC ICEs in trunc_int_for_mode, because it > tries to optimize vector << 2 shift as multiplication by vector mode 4 > and trunc_int_for_mode with vector mode isn't supported. > > Fixed thusly, I guess it doesn't trigger that often because usually > vector shifts aren't used in MEM addresses, in this case it is used > in it inside of some SUBREGs and other shifts. > > Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk? Ok. Thanks, Richard. > 2011-02-09 Jakub Jelinek <jakub@redhat.com> > > PR target/47665 > * combine.c (make_compound_operation): Only change shifts into > multiplication for SCALAR_INT_MODE_P. > > * gcc.target/i386/pr47665.c: New test. > > --- gcc/combine.c.jj 2011-02-07 14:51:15.000000000 +0100 > +++ gcc/combine.c 2011-02-09 18:15:33.537796172 +0100 > @@ -7485,7 +7485,8 @@ make_compound_operation (rtx x, enum rtx > an address. */ > if (in_code == MEM && CONST_INT_P (XEXP (x, 1)) > && INTVAL (XEXP (x, 1)) < HOST_BITS_PER_WIDE_INT > - && INTVAL (XEXP (x, 1)) >= 0) > + && INTVAL (XEXP (x, 1)) >= 0 > + && SCALAR_INT_MODE_P (mode)) > { > HOST_WIDE_INT count = INTVAL (XEXP (x, 1)); > HOST_WIDE_INT multval = (HOST_WIDE_INT) 1 << count; > --- gcc/testsuite/gcc.target/i386/pr47665.c.jj 2011-02-09 18:27:14.245513964 +0100 > +++ gcc/testsuite/gcc.target/i386/pr47665.c 2011-02-09 18:26:38.000000000 +0100 > @@ -0,0 +1,11 @@ > +/* PR target/47665 */ > +/* { dg-do compile } */ > +/* { dg-options "-O2 -msse2" } */ > + > +#include <emmintrin.h> > + > +__m128d > +foo (double *x, __m128i y) > +{ > + return _mm_load_pd (x + _mm_cvtsi128_si32 (_mm_srli_si128 (_mm_slli_epi32 (y, 2), 0))); > +} > > Jakub >
--- gcc/combine.c.jj 2011-02-07 14:51:15.000000000 +0100 +++ gcc/combine.c 2011-02-09 18:15:33.537796172 +0100 @@ -7485,7 +7485,8 @@ make_compound_operation (rtx x, enum rtx an address. */ if (in_code == MEM && CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) < HOST_BITS_PER_WIDE_INT - && INTVAL (XEXP (x, 1)) >= 0) + && INTVAL (XEXP (x, 1)) >= 0 + && SCALAR_INT_MODE_P (mode)) { HOST_WIDE_INT count = INTVAL (XEXP (x, 1)); HOST_WIDE_INT multval = (HOST_WIDE_INT) 1 << count; --- gcc/testsuite/gcc.target/i386/pr47665.c.jj 2011-02-09 18:27:14.245513964 +0100 +++ gcc/testsuite/gcc.target/i386/pr47665.c 2011-02-09 18:26:38.000000000 +0100 @@ -0,0 +1,11 @@ +/* PR target/47665 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -msse2" } */ + +#include <emmintrin.h> + +__m128d +foo (double *x, __m128i y) +{ + return _mm_load_pd (x + _mm_cvtsi128_si32 (_mm_srli_si128 (_mm_slli_epi32 (y, 2), 0))); +}