[U-Boot,v3,17/20] arm: socfpga: Adding SoCFPGA info for both SPL and U-boot

Message ID 1507882137-27841-18-git-send-email-tien.fong.chee@intel.com
State Superseded
Delegated to: Marek Vasut
Headers show
Series
  • Add FPGA, SDRAM, SPL loadfs U-boot & booting to console
Related show

Commit Message

Chee, Tien Fong Oct. 13, 2017, 8:08 a.m.
From: Tien Fong Chee <tien.fong.chee@intel.com>

SoC FPGA info is required in both SPL and U-boot.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
---
 arch/arm/mach-socfpga/board.c        | 3 +++
 arch/arm/mach-socfpga/misc_arria10.c | 5 -----
 arch/arm/mach-socfpga/spl.c          | 6 ++++++
 3 files changed, 9 insertions(+), 5 deletions(-)

Comments

Dinh Nguyen Oct. 20, 2017, 2:33 p.m. | #1
On 10/13/2017 03:08 AM, tien.fong.chee@intel.com wrote:
> From: Tien Fong Chee <tien.fong.chee@intel.com>
> 
> SoC FPGA info is required in both SPL and U-boot.

s/SoC FPGA/SocFPGA to be consistent.

s/U-boot/U-Boot

> 
> Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
> ---
>  arch/arm/mach-socfpga/board.c        | 3 +++
>  arch/arm/mach-socfpga/misc_arria10.c | 5 -----
>  arch/arm/mach-socfpga/spl.c          | 6 ++++++
>  3 files changed, 9 insertions(+), 5 deletions(-)
> 
> diff --git a/arch/arm/mach-socfpga/board.c b/arch/arm/mach-socfpga/board.c
> index 9a96f52..7beb347 100644
> --- a/arch/arm/mach-socfpga/board.c
> +++ b/arch/arm/mach-socfpga/board.c
> @@ -32,6 +32,9 @@ int board_init(void)
>  #if defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
>  	/* configuring the clock based on handoff */
>  	cm_basic_init(gd->fdt_blob);
> +
> +	/* Add device descriptor to FPGA device table */
> +	socfpga_fpga_add();
>  #endif
>  
>  	return 0;
> diff --git a/arch/arm/mach-socfpga/misc_arria10.c b/arch/arm/mach-socfpga/misc_arria10.c
> index 9d751f6..8760ac9 100644
> --- a/arch/arm/mach-socfpga/misc_arria10.c
> +++ b/arch/arm/mach-socfpga/misc_arria10.c
> @@ -94,11 +94,6 @@ int arch_early_init_r(void)
>  	/* assert reset to all except L4WD0 and L4TIMER0 */
>  	socfpga_per_reset_all();
>  
> -	/* configuring the clock based on handoff */
> -	/* TODO: Add call to cm_basic_init() */
> -
> -	/* Add device descriptor to FPGA device table */
> -	socfpga_fpga_add();

Why remove it from here?

>  	return 0;
>  }
>  #else
> diff --git a/arch/arm/mach-socfpga/spl.c b/arch/arm/mach-socfpga/spl.c
> index 71bae82..aba116d 100644
> --- a/arch/arm/mach-socfpga/spl.c
> +++ b/arch/arm/mach-socfpga/spl.c
> @@ -15,6 +15,7 @@
>  #include <asm/arch/system_manager.h>
>  #include <asm/arch/freeze_controller.h>
>  #include <asm/arch/clock_manager.h>
> +#include <asm/arch/misc.h>
>  #include <asm/arch/scan_manager.h>
>  #include <asm/arch/sdram.h>
>  #include <asm/arch/scu.h>
> @@ -208,6 +209,11 @@ void spl_board_init(void)
>  
>  	/* enable console uart printing */
>  	preloader_console_init();
> +
> +	WATCHDOG_RESET();
> +
> +	/* Add device descriptor to FPGA device table */
> +	socfpga_fpga_add();

And add here?

Dinh
Chee, Tien Fong Oct. 23, 2017, 8:13 a.m. | #2
On Jum, 2017-10-20 at 09:33 -0500, Dinh Nguyen wrote:
> 

> On 10/13/2017 03:08 AM, tien.fong.chee@intel.com wrote:

> > 

> > From: Tien Fong Chee <tien.fong.chee@intel.com>

> > 

> > SoC FPGA info is required in both SPL and U-boot.

> s/SoC FPGA/SocFPGA to be consistent.

> 

> s/U-boot/U-Boot

> 

Okay.
> > 

> > 

> > Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>

> > ---

> >  arch/arm/mach-socfpga/board.c        | 3 +++

> >  arch/arm/mach-socfpga/misc_arria10.c | 5 -----

> >  arch/arm/mach-socfpga/spl.c          | 6 ++++++

> >  3 files changed, 9 insertions(+), 5 deletions(-)

> > 

> > diff --git a/arch/arm/mach-socfpga/board.c b/arch/arm/mach-

> > socfpga/board.c

> > index 9a96f52..7beb347 100644

> > --- a/arch/arm/mach-socfpga/board.c

> > +++ b/arch/arm/mach-socfpga/board.c

> > @@ -32,6 +32,9 @@ int board_init(void)

> >  #if defined(CONFIG_TARGET_SOCFPGA_ARRIA10)

> >  	/* configuring the clock based on handoff */

> >  	cm_basic_init(gd->fdt_blob);

> > +

> > +	/* Add device descriptor to FPGA device table */

> > +	socfpga_fpga_add();

> >  #endif

> >  

> >  	return 0;

> > diff --git a/arch/arm/mach-socfpga/misc_arria10.c b/arch/arm/mach-

> > socfpga/misc_arria10.c

> > index 9d751f6..8760ac9 100644

> > --- a/arch/arm/mach-socfpga/misc_arria10.c

> > +++ b/arch/arm/mach-socfpga/misc_arria10.c

> > @@ -94,11 +94,6 @@ int arch_early_init_r(void)

> >  	/* assert reset to all except L4WD0 and L4TIMER0 */

> >  	socfpga_per_reset_all();

> >  

> > -	/* configuring the clock based on handoff */

> > -	/* TODO: Add call to cm_basic_init() */

> > -

> > -	/* Add device descriptor to FPGA device table */

> > -	socfpga_fpga_add();

> Why remove it from here?

> 

Initially, this is only created for SPL. Until U-Boot enable
development phase, i realized this also required by U-boot. So i
duplicated socfpga_fpga_add in both SPL(spl.c - below) and U-
Boot(board.c - above).
> > 

> >  	return 0;

> >  }

> >  #else

> > diff --git a/arch/arm/mach-socfpga/spl.c b/arch/arm/mach-

> > socfpga/spl.c

> > index 71bae82..aba116d 100644

> > --- a/arch/arm/mach-socfpga/spl.c

> > +++ b/arch/arm/mach-socfpga/spl.c

> > @@ -15,6 +15,7 @@

> >  #include <asm/arch/system_manager.h>

> >  #include <asm/arch/freeze_controller.h>

> >  #include <asm/arch/clock_manager.h>

> > +#include <asm/arch/misc.h>

> >  #include <asm/arch/scan_manager.h>

> >  #include <asm/arch/sdram.h>

> >  #include <asm/arch/scu.h>

> > @@ -208,6 +209,11 @@ void spl_board_init(void)

> >  

> >  	/* enable console uart printing */

> >  	preloader_console_init();

> > +

> > +	WATCHDOG_RESET();

> > +

> > +	/* Add device descriptor to FPGA device table */

> > +	socfpga_fpga_add();

> And add here?

> 

Refer to my comment above.
> Dinh

Patch

diff --git a/arch/arm/mach-socfpga/board.c b/arch/arm/mach-socfpga/board.c
index 9a96f52..7beb347 100644
--- a/arch/arm/mach-socfpga/board.c
+++ b/arch/arm/mach-socfpga/board.c
@@ -32,6 +32,9 @@  int board_init(void)
 #if defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
 	/* configuring the clock based on handoff */
 	cm_basic_init(gd->fdt_blob);
+
+	/* Add device descriptor to FPGA device table */
+	socfpga_fpga_add();
 #endif
 
 	return 0;
diff --git a/arch/arm/mach-socfpga/misc_arria10.c b/arch/arm/mach-socfpga/misc_arria10.c
index 9d751f6..8760ac9 100644
--- a/arch/arm/mach-socfpga/misc_arria10.c
+++ b/arch/arm/mach-socfpga/misc_arria10.c
@@ -94,11 +94,6 @@  int arch_early_init_r(void)
 	/* assert reset to all except L4WD0 and L4TIMER0 */
 	socfpga_per_reset_all();
 
-	/* configuring the clock based on handoff */
-	/* TODO: Add call to cm_basic_init() */
-
-	/* Add device descriptor to FPGA device table */
-	socfpga_fpga_add();
 	return 0;
 }
 #else
diff --git a/arch/arm/mach-socfpga/spl.c b/arch/arm/mach-socfpga/spl.c
index 71bae82..aba116d 100644
--- a/arch/arm/mach-socfpga/spl.c
+++ b/arch/arm/mach-socfpga/spl.c
@@ -15,6 +15,7 @@ 
 #include <asm/arch/system_manager.h>
 #include <asm/arch/freeze_controller.h>
 #include <asm/arch/clock_manager.h>
+#include <asm/arch/misc.h>
 #include <asm/arch/scan_manager.h>
 #include <asm/arch/sdram.h>
 #include <asm/arch/scu.h>
@@ -208,6 +209,11 @@  void spl_board_init(void)
 
 	/* enable console uart printing */
 	preloader_console_init();
+
+	WATCHDOG_RESET();
+
+	/* Add device descriptor to FPGA device table */
+	socfpga_fpga_add();
 }
 
 void board_init_f(ulong dummy)