From patchwork Fri Oct 13 08:08:44 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chee, Tien Fong" X-Patchwork-Id: 825256 X-Patchwork-Delegate: marek.vasut@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3yD0pT2mS2z9s76 for ; Fri, 13 Oct 2017 19:13:21 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id F4185C21FD3; Fri, 13 Oct 2017 08:10:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 5B452C21F45; Fri, 13 Oct 2017 08:09:53 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 28255C21F61; Fri, 13 Oct 2017 08:09:50 +0000 (UTC) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by lists.denx.de (Postfix) with ESMTPS id A048FC21F8C for ; Fri, 13 Oct 2017 08:09:43 +0000 (UTC) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 13 Oct 2017 01:09:42 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.43,369,1503385200"; d="scan'208";a="146036819" Received: from tfchee-mobl.gar.corp.intel.com (HELO tienfong.fm.intel.com, ) ([10.226.242.149]) by orsmga002.jf.intel.com with ESMTP; 13 Oct 2017 01:09:25 -0700 From: tien.fong.chee@intel.com To: u-boot@lists.denx.de Date: Fri, 13 Oct 2017 16:08:44 +0800 Message-Id: <1507882137-27841-8-git-send-email-tien.fong.chee@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1507882137-27841-1-git-send-email-tien.fong.chee@intel.com> References: <1507882137-27841-1-git-send-email-tien.fong.chee@intel.com> Cc: Marek Vasut , Tien Fong Chee , Ching Liang See , Tien Fong , Westergteen Dalon Subject: [U-Boot] [PATCH v3 07/20] arm: socfpga: Fix with the correct polling status bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Tien Fong Chee Commit 2baa997240d ("arm: socfpga: Add FPGA driver support for Arria 10") Polling the wrong status bit. Fix with correct polling status bit. Fixes: 2baa997240d ("arm: socfpga: Add FPGA driver support for Arria 10") Signed-off-by: Tien Fong Chee --- drivers/fpga/socfpga_arria10.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/fpga/socfpga_arria10.c b/drivers/fpga/socfpga_arria10.c index 5c1a68a..e076bda 100644 --- a/drivers/fpga/socfpga_arria10.c +++ b/drivers/fpga/socfpga_arria10.c @@ -112,13 +112,14 @@ static int wait_for_nconfig_pin_and_nstatus_pin(void) unsigned long mask = ALT_FPGAMGR_IMGCFG_STAT_F2S_NCONFIG_PIN_SET_MSK | ALT_FPGAMGR_IMGCFG_STAT_F2S_NSTATUS_PIN_SET_MSK; - /* Poll until f2s_nconfig_pin and f2s_nstatus_pin; loop until de-asserted, - * timeout at 1000ms + /* + * Poll until f2s_nconfig_pin and f2s_nstatus_pin; loop until + * de-asserted, timeout at 1000ms */ return wait_for_bit(__func__, &fpga_manager_base->imgcfg_stat, mask, - false, FPGA_TIMEOUT_MSEC, false); + true, FPGA_TIMEOUT_MSEC, false); } static int wait_for_f2s_nstatus_pin(unsigned long value)