[U-Boot,v3,07/20] arm: socfpga: Fix with the correct polling status bit

Message ID 1507882137-27841-8-git-send-email-tien.fong.chee@intel.com
State New
Delegated to: Marek Vasut
Headers show
Series
  • Add FPGA, SDRAM, SPL loadfs U-boot & booting to console
Related show

Commit Message

Chee, Tien Fong Oct. 13, 2017, 8:08 a.m.
From: Tien Fong Chee <tien.fong.chee@intel.com>

Commit 2baa997240d ("arm: socfpga: Add FPGA driver support for Arria 10")
Polling the wrong status bit. Fix with correct polling status bit.

Fixes: 2baa997240d ("arm: socfpga: Add FPGA driver support for Arria 10")

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
---
 drivers/fpga/socfpga_arria10.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

Comments

Dinh Nguyen Oct. 16, 2017, 3:29 p.m. | #1
On 10/13/2017 03:08 AM, tien.fong.chee@intel.com wrote:
> From: Tien Fong Chee <tien.fong.chee@intel.com>
> 
> Commit 2baa997240d ("arm: socfpga: Add FPGA driver support for Arria 10")
> Polling the wrong status bit. Fix with correct polling status bit.

This message doesn't reflect what the patch is doing. The patch is
checking for the bit be set or cleared, not the status bit.

Dinh
> 
> Fixes: 2baa997240d ("arm: socfpga: Add FPGA driver support for Arria 10")
> 
> Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
> ---
>  drivers/fpga/socfpga_arria10.c | 7 ++++---
>  1 file changed, 4 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/fpga/socfpga_arria10.c b/drivers/fpga/socfpga_arria10.c
> index 5c1a68a..e076bda 100644
> --- a/drivers/fpga/socfpga_arria10.c
> +++ b/drivers/fpga/socfpga_arria10.c
> @@ -112,13 +112,14 @@ static int wait_for_nconfig_pin_and_nstatus_pin(void)
>  	unsigned long mask = ALT_FPGAMGR_IMGCFG_STAT_F2S_NCONFIG_PIN_SET_MSK |
>  				ALT_FPGAMGR_IMGCFG_STAT_F2S_NSTATUS_PIN_SET_MSK;
>  
> -	/* Poll until f2s_nconfig_pin and f2s_nstatus_pin; loop until de-asserted,
> -	 * timeout at 1000ms
> +	/*
> +	 * Poll until f2s_nconfig_pin and f2s_nstatus_pin; loop until
> +	 * de-asserted, timeout at 1000ms
>  	 */
>  	return wait_for_bit(__func__,
>  			    &fpga_manager_base->imgcfg_stat,
>  			    mask,
> -			    false, FPGA_TIMEOUT_MSEC, false);
> +			    true, FPGA_TIMEOUT_MSEC, false);
>  }
>  
>  static int wait_for_f2s_nstatus_pin(unsigned long value)
>

Patch

diff --git a/drivers/fpga/socfpga_arria10.c b/drivers/fpga/socfpga_arria10.c
index 5c1a68a..e076bda 100644
--- a/drivers/fpga/socfpga_arria10.c
+++ b/drivers/fpga/socfpga_arria10.c
@@ -112,13 +112,14 @@  static int wait_for_nconfig_pin_and_nstatus_pin(void)
 	unsigned long mask = ALT_FPGAMGR_IMGCFG_STAT_F2S_NCONFIG_PIN_SET_MSK |
 				ALT_FPGAMGR_IMGCFG_STAT_F2S_NSTATUS_PIN_SET_MSK;
 
-	/* Poll until f2s_nconfig_pin and f2s_nstatus_pin; loop until de-asserted,
-	 * timeout at 1000ms
+	/*
+	 * Poll until f2s_nconfig_pin and f2s_nstatus_pin; loop until
+	 * de-asserted, timeout at 1000ms
 	 */
 	return wait_for_bit(__func__,
 			    &fpga_manager_base->imgcfg_stat,
 			    mask,
-			    false, FPGA_TIMEOUT_MSEC, false);
+			    true, FPGA_TIMEOUT_MSEC, false);
 }
 
 static int wait_for_f2s_nstatus_pin(unsigned long value)