From patchwork Fri Oct 13 08:08:39 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chee, Tien Fong" X-Patchwork-Id: 825255 X-Patchwork-Delegate: marek.vasut@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3yD0pB0dskz9s76 for ; Fri, 13 Oct 2017 19:13:04 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id B0318C21F8C; Fri, 13 Oct 2017 08:10:23 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 49CD9C21FB6; Fri, 13 Oct 2017 08:09:45 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 85DA6C21EF2; Fri, 13 Oct 2017 08:09:42 +0000 (UTC) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by lists.denx.de (Postfix) with ESMTPS id BC495C21EF2 for ; Fri, 13 Oct 2017 08:09:41 +0000 (UTC) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 13 Oct 2017 01:09:39 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.43,369,1503385200"; d="scan'208";a="146036794" Received: from tfchee-mobl.gar.corp.intel.com (HELO tienfong.fm.intel.com, ) ([10.226.242.149]) by orsmga002.jf.intel.com with ESMTP; 13 Oct 2017 01:09:12 -0700 From: tien.fong.chee@intel.com To: u-boot@lists.denx.de Date: Fri, 13 Oct 2017 16:08:39 +0800 Message-Id: <1507882137-27841-3-git-send-email-tien.fong.chee@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1507882137-27841-1-git-send-email-tien.fong.chee@intel.com> References: <1507882137-27841-1-git-send-email-tien.fong.chee@intel.com> Cc: Marek Vasut , Tien Fong Chee , Ching Liang See , Tien Fong , Westergteen Dalon Subject: [U-Boot] [PATCH v3 02/20] dts: Add FPGA bitstream properties to Arria 10 DTS X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Tien Fong Chee These FPGA bitstream properties would help bootloader to understand how to configure FPGA and where to look the FPGA RBF files during booting. Signed-off-by: Tien Fong Chee --- arch/arm/dts/socfpga_arria10.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/dts/socfpga_arria10.dtsi b/arch/arm/dts/socfpga_arria10.dtsi index 377700d..aeb2be8 100644 --- a/arch/arm/dts/socfpga_arria10.dtsi +++ b/arch/arm/dts/socfpga_arria10.dtsi @@ -538,6 +538,11 @@ clocks = <&l4_mp_clk>; resets = <&rst FPGAMGR_RESET>; reset-names = "fpgamgr"; + altr,bitstream_periph = + "ghrd_10as066n2.periph.rbf.mkimage"; + altr,bitstream_core = + "ghrd_10as066n2.core.rbf.mkimage"; + altr,bitstream_devpart = "0:1"; }; i2c0: i2c@ffc02200 {