[4/6] dt-bindings: media: ti-vpe: Document VPE driver

Message ID 20171012192719.15193-5-bparrot@ti.com
State Changes Requested
Headers show
Series
  • ARM: dts/hwmod: Add CAL and VPE nodes
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Commit Message

Benoit Parrot Oct. 12, 2017, 7:27 p.m.
Device Tree bindings for the Video Processing Engine (VPE) driver.

Signed-off-by: Benoit Parrot <bparrot@ti.com>
---
 Documentation/devicetree/bindings/media/ti-vpe.txt | 41 ++++++++++++++++++++++
 1 file changed, 41 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/media/ti-vpe.txt

Comments

Rob Herring Oct. 17, 2017, 9 p.m. | #1
On Thu, Oct 12, 2017 at 02:27:17PM -0500, Benoit Parrot wrote:
> Device Tree bindings for the Video Processing Engine (VPE) driver.
> 
> Signed-off-by: Benoit Parrot <bparrot@ti.com>
> ---
>  Documentation/devicetree/bindings/media/ti-vpe.txt | 41 ++++++++++++++++++++++
>  1 file changed, 41 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/media/ti-vpe.txt
> 
> diff --git a/Documentation/devicetree/bindings/media/ti-vpe.txt b/Documentation/devicetree/bindings/media/ti-vpe.txt
> new file mode 100644
> index 000000000000..c2ef93d08417
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/ti-vpe.txt
> @@ -0,0 +1,41 @@
> +Texas Instruments DRA7x VIDEO PROCESSING ENGINE (VPE)
> +------------------------------------------------------
> +
> +The Video Processing Engine (VPE) is a key component for image post
> +processing applications. VPE consist of a single memory to memory
> +path which can perform chroma up/down sampling, deinterlacing,
> +scaling and color space conversion.
> +
> +Required properties:
> +- compatible: must be "ti,vpe"

Needs SoC specific compatibles.

> +- reg:	physical base address and length of the registers set for the 8
> +	memory regions required;
> +- reg-names: name associated with the memory regions described is <reg>;
> +- interrupts: should contain IRQ line for VPE;
> +
> +Example:
> +	vpe {
> +		compatible = "ti,vpe";
> +		ti,hwmods = "vpe";
> +		clocks = <&dpll_core_h23x2_ck>;
> +		clock-names = "fck";
> +		reg =	<0x489d0000 0x120>,
> +			<0x489d0300 0x20>,
> +			<0x489d0400 0x20>,
> +			<0x489d0500 0x20>,
> +			<0x489d0600 0x3c>,
> +			<0x489d0700 0x80>,

Is there other stuff between these regions?

> +			<0x489d5700 0x18>,
> +			<0x489dd000 0x400>;
> +		reg-names =	"vpe_top",
> +				"vpe_chr_us0",
> +				"vpe_chr_us1",
> +				"vpe_chr_us2",
> +				"vpe_dei",
> +				"sc",
> +				"csc",
> +				"vpdma";
> +		interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;

> +		#address-cells = <1>;
> +		#size-cells = <0>;

These aren't needed.

> +	};
> -- 
> 2.9.0
> 
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Benoit Parrot Oct. 18, 2017, 1:02 p.m. | #2
Rob Herring <robh@kernel.org> wrote on Tue [2017-Oct-17 16:00:51 -0500]:
> On Thu, Oct 12, 2017 at 02:27:17PM -0500, Benoit Parrot wrote:
> > Device Tree bindings for the Video Processing Engine (VPE) driver.
> > 
> > Signed-off-by: Benoit Parrot <bparrot@ti.com>
> > ---
> >  Documentation/devicetree/bindings/media/ti-vpe.txt | 41 ++++++++++++++++++++++
> >  1 file changed, 41 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/media/ti-vpe.txt
> > 
> > diff --git a/Documentation/devicetree/bindings/media/ti-vpe.txt b/Documentation/devicetree/bindings/media/ti-vpe.txt
> > new file mode 100644
> > index 000000000000..c2ef93d08417
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/media/ti-vpe.txt
> > @@ -0,0 +1,41 @@
> > +Texas Instruments DRA7x VIDEO PROCESSING ENGINE (VPE)
> > +------------------------------------------------------
> > +
> > +The Video Processing Engine (VPE) is a key component for image post
> > +processing applications. VPE consist of a single memory to memory
> > +path which can perform chroma up/down sampling, deinterlacing,
> > +scaling and color space conversion.
> > +
> > +Required properties:
> > +- compatible: must be "ti,vpe"
> 
> Needs SoC specific compatibles.

This particular I/P is present on all DRA7x family of devices
so would "ti,dra7-vpe" be acceptable?

> 
> > +- reg:	physical base address and length of the registers set for the 8
> > +	memory regions required;
> > +- reg-names: name associated with the memory regions described is <reg>;
> > +- interrupts: should contain IRQ line for VPE;
> > +
> > +Example:
> > +	vpe {
> > +		compatible = "ti,vpe";
> > +		ti,hwmods = "vpe";
> > +		clocks = <&dpll_core_h23x2_ck>;
> > +		clock-names = "fck";
> > +		reg =	<0x489d0000 0x120>,
> > +			<0x489d0300 0x20>,
> > +			<0x489d0400 0x20>,
> > +			<0x489d0500 0x20>,
> > +			<0x489d0600 0x3c>,
> > +			<0x489d0700 0x80>,
> 
> Is there other stuff between these regions?

No, they listed separately because each sub-region/module is
individually mapped and accessed using a starting 0 offset.

> 
> > +			<0x489d5700 0x18>,
> > +			<0x489dd000 0x400>;
> > +		reg-names =	"vpe_top",
> > +				"vpe_chr_us0",
> > +				"vpe_chr_us1",
> > +				"vpe_chr_us2",
> > +				"vpe_dei",
> > +				"sc",
> > +				"csc",
> > +				"vpdma";
> > +		interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
> 
> > +		#address-cells = <1>;
> > +		#size-cells = <0>;
> 
> These aren't needed.

OK, I'll remove those.

Benoit

> 
> > +	};
> > -- 
> > 2.9.0
> > 
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Rob Herring Oct. 19, 2017, 9:06 p.m. | #3
On Wed, Oct 18, 2017 at 8:02 AM, Benoit Parrot <bparrot@ti.com> wrote:
> Rob Herring <robh@kernel.org> wrote on Tue [2017-Oct-17 16:00:51 -0500]:
>> On Thu, Oct 12, 2017 at 02:27:17PM -0500, Benoit Parrot wrote:
>> > Device Tree bindings for the Video Processing Engine (VPE) driver.
>> >
>> > Signed-off-by: Benoit Parrot <bparrot@ti.com>
>> > ---
>> >  Documentation/devicetree/bindings/media/ti-vpe.txt | 41 ++++++++++++++++++++++
>> >  1 file changed, 41 insertions(+)
>> >  create mode 100644 Documentation/devicetree/bindings/media/ti-vpe.txt
>> >
>> > diff --git a/Documentation/devicetree/bindings/media/ti-vpe.txt b/Documentation/devicetree/bindings/media/ti-vpe.txt
>> > new file mode 100644
>> > index 000000000000..c2ef93d08417
>> > --- /dev/null
>> > +++ b/Documentation/devicetree/bindings/media/ti-vpe.txt
>> > @@ -0,0 +1,41 @@
>> > +Texas Instruments DRA7x VIDEO PROCESSING ENGINE (VPE)
>> > +------------------------------------------------------
>> > +
>> > +The Video Processing Engine (VPE) is a key component for image post
>> > +processing applications. VPE consist of a single memory to memory
>> > +path which can perform chroma up/down sampling, deinterlacing,
>> > +scaling and color space conversion.
>> > +
>> > +Required properties:
>> > +- compatible: must be "ti,vpe"
>>
>> Needs SoC specific compatibles.
>
> This particular I/P is present on all DRA7x family of devices
> so would "ti,dra7-vpe" be acceptable?

Better, but it's proven not to be in other cases IIRC. I'll leave it
to TI maintainers to decide.

>> > +- reg:     physical base address and length of the registers set for the 8
>> > +   memory regions required;
>> > +- reg-names: name associated with the memory regions described is <reg>;
>> > +- interrupts: should contain IRQ line for VPE;
>> > +
>> > +Example:
>> > +   vpe {
>> > +           compatible = "ti,vpe";
>> > +           ti,hwmods = "vpe";
>> > +           clocks = <&dpll_core_h23x2_ck>;
>> > +           clock-names = "fck";
>> > +           reg =   <0x489d0000 0x120>,
>> > +                   <0x489d0300 0x20>,
>> > +                   <0x489d0400 0x20>,
>> > +                   <0x489d0500 0x20>,
>> > +                   <0x489d0600 0x3c>,
>> > +                   <0x489d0700 0x80>,
>>
>> Is there other stuff between these regions?
>
> No, they listed separately because each sub-region/module is
> individually mapped and accessed using a starting 0 offset.

So you are going to use 48KB of virtual memory to map 2KB of
registers? Because each ioremap uses 8KB (1 page plus 1 guard page)
last time i looked (which has been a while).

But it's your platform.
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Tony Lindgren Oct. 19, 2017, 9:20 p.m. | #4
* Rob Herring <robh@kernel.org> [171019 14:07]:
> On Wed, Oct 18, 2017 at 8:02 AM, Benoit Parrot <bparrot@ti.com> wrote:
> >> > +Example:
> >> > +   vpe {
> >> > +           compatible = "ti,vpe";
> >> > +           ti,hwmods = "vpe";
> >> > +           clocks = <&dpll_core_h23x2_ck>;
> >> > +           clock-names = "fck";
> >> > +           reg =   <0x489d0000 0x120>,
> >> > +                   <0x489d0300 0x20>,
> >> > +                   <0x489d0400 0x20>,
> >> > +                   <0x489d0500 0x20>,
> >> > +                   <0x489d0600 0x3c>,
> >> > +                   <0x489d0700 0x80>,
> >>
> >> Is there other stuff between these regions?
> >
> > No, they listed separately because each sub-region/module is
> > individually mapped and accessed using a starting 0 offset.
> 
> So you are going to use 48KB of virtual memory to map 2KB of
> registers? Because each ioremap uses 8KB (1 page plus 1 guard page)
> last time i looked (which has been a while).
> 
> But it's your platform.

We should have cached regions for all interconnects so this should
not be a problem. Worth checking that the areas are listed in
dra7xx_io_desc[] and for other SoCs too to avoid this issue.

Regards,

Tony
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Patch

diff --git a/Documentation/devicetree/bindings/media/ti-vpe.txt b/Documentation/devicetree/bindings/media/ti-vpe.txt
new file mode 100644
index 000000000000..c2ef93d08417
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/ti-vpe.txt
@@ -0,0 +1,41 @@ 
+Texas Instruments DRA7x VIDEO PROCESSING ENGINE (VPE)
+------------------------------------------------------
+
+The Video Processing Engine (VPE) is a key component for image post
+processing applications. VPE consist of a single memory to memory
+path which can perform chroma up/down sampling, deinterlacing,
+scaling and color space conversion.
+
+Required properties:
+- compatible: must be "ti,vpe"
+- reg:	physical base address and length of the registers set for the 8
+	memory regions required;
+- reg-names: name associated with the memory regions described is <reg>;
+- interrupts: should contain IRQ line for VPE;
+
+Example:
+	vpe {
+		compatible = "ti,vpe";
+		ti,hwmods = "vpe";
+		clocks = <&dpll_core_h23x2_ck>;
+		clock-names = "fck";
+		reg =	<0x489d0000 0x120>,
+			<0x489d0300 0x20>,
+			<0x489d0400 0x20>,
+			<0x489d0500 0x20>,
+			<0x489d0600 0x3c>,
+			<0x489d0700 0x80>,
+			<0x489d5700 0x18>,
+			<0x489dd000 0x400>;
+		reg-names =	"vpe_top",
+				"vpe_chr_us0",
+				"vpe_chr_us1",
+				"vpe_chr_us2",
+				"vpe_dei",
+				"sc",
+				"csc",
+				"vpdma";
+		interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};