From patchwork Wed Oct 11 17:50:04 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: maddy X-Patchwork-Id: 824497 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3yC1jh6FYHz9t2Z for ; Thu, 12 Oct 2017 04:50:48 +1100 (AEDT) Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3yC1jf6WZLzDr6M for ; Thu, 12 Oct 2017 04:50:46 +1100 (AEDT) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=linux.vnet.ibm.com (client-ip=148.163.158.5; helo=mx0a-001b2d01.pphosted.com; envelope-from=maddy@linux.vnet.ibm.com; receiver=) Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3yC1jB2vmRzDr5x for ; Thu, 12 Oct 2017 04:50:21 +1100 (AEDT) Received: from pps.filterd (m0098416.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id v9BHmjFM185134 for ; Wed, 11 Oct 2017 13:50:18 -0400 Received: from e06smtp14.uk.ibm.com (e06smtp14.uk.ibm.com [195.75.94.110]) by mx0b-001b2d01.pphosted.com with ESMTP id 2dhn6w8f9q-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Wed, 11 Oct 2017 13:50:17 -0400 Received: from localhost by e06smtp14.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Wed, 11 Oct 2017 18:50:14 +0100 Received: from d23av03.au.ibm.com (d23av03.au.ibm.com [9.190.234.97]) by b06cxnps3075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id v9BHoCSX21495978 for ; Wed, 11 Oct 2017 17:50:13 GMT Received: from d23av03.au.ibm.com (localhost [127.0.0.1]) by d23av03.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id v9BHo5Pb003437 for ; Thu, 12 Oct 2017 04:50:05 +1100 Received: from SrihariSrinidhi.in.ibm.com ([9.84.218.230]) by d23av03.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with ESMTP id v9BHo0sV003296; Thu, 12 Oct 2017 04:50:02 +1100 From: Madhavan Srinivasan To: stewart@linux.vnet.ibm.com Date: Wed, 11 Oct 2017 23:20:04 +0530 X-Mailer: git-send-email 2.7.4 X-TM-AS-MML: disable x-cbid: 17101117-0016-0000-0000-000004F4DBEC X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17101117-0017-0000-0000-0000282FEB5C Message-Id: <1507744204-23316-1-git-send-email-maddy@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-10-11_06:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=1 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1707230000 definitions=main-1710110248 Subject: [Skiboot] [PATCH v2] hw/imc: pause microcode at boot X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.24 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: skiboot@lists.ozlabs.org MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" IMC nest counters has both in-band (ucode access) and out of band access to it. Since not all nest counter configurations are supported by ucode, out of band tools are used to characterize other configuration. So it is prefer to pause the nest microcode at boot to aid the nest out of band tools. If the ucode not paused and OS does not have IMC driver support, then out to band tools will race with ucode and end up getting undesirable values. Patch to check and pause the ucode at boot. OPAL provides APIs to control IMC counters. OPAL_IMC_COUNTERS_INIT is used to initialize these counters at boot. OPAL_IMC_COUNTERS_START and OPAL_IMC_COUNTERS_STOP API calls should be used to start and pause these IMC engines. `doc/opal-api/opal-imc-counters.rst` details the OPAL APIs and their usage. Signed-off-by: Madhavan Srinivasan --- hw/imc.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/hw/imc.c b/hw/imc.c index 4b2e94884198..72207e141c73 100644 --- a/hw/imc.c +++ b/hw/imc.c @@ -160,6 +160,18 @@ static struct imc_chip_cb *get_imc_cb(uint32_t chip_id) return cb; } +static void pause_microcode_at_boot(void) +{ + struct proc_chip *chip; + struct imc_chip_cb *cb; + + for_each_chip(chip) { + cb = get_imc_cb(chip->id); + if (cb) + cb->imc_chip_command = cpu_to_be64(NEST_IMC_DISABLE); + } +} + /* * Decompresses the blob obtained from the IMC pnor sub-partition * in "src" of size "src_size", assigns the uncompressed device tree @@ -543,6 +555,18 @@ imc_mambo: return; /* + * IMC nest counters has both in-band (ucode access) and out of band + * access to it. Since not all nest counter configurations are supported + * by ucode, out of band tools are used to characterize other + * configuration. + * + * If the ucode not paused and OS does not have IMC driver support, + * then out to band tools will race with ucode and end up getting + * undesirable values. Hence pause the ucode if it is already running. + */ + pause_microcode_at_boot(); + + /* * If the dt_attach_root() fails, "imc-counters" node will not be * seen in the device-tree and hence OS should not make any * OPAL_IMC_* calls.