[U-Boot,v5,06/18] rockchip: rk3036: use aligned address for SPL_TEXT_BASE

Message ID 1507645279-25188-7-git-send-email-philipp.tomsich@theobroma-systems.com
State New
Delegated to: Philipp Tomsich
Headers show
Series
  • rockchip: back-to-bootrom: replace assembly-implementation with C-code
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Commit Message

Philipp Tomsich Oct. 10, 2017, 2:21 p.m.
With the boot0-hook inserting the additional padding to receive our
SPL magic, the SPL_TEXT_BASE can be aligned again.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
---

Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 include/configs/rk3036_common.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Patch

diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index 9ac0df5..a387099 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -26,7 +26,7 @@ 
 #define CONFIG_SYS_INIT_SP_ADDR		0x60100000
 #define CONFIG_SYS_LOAD_ADDR		0x60800800
 #define CONFIG_SPL_STACK		0x10081fff
-#define CONFIG_SPL_TEXT_BASE		0x10081004
+#define CONFIG_SPL_TEXT_BASE		0x10081000
 
 #define CONFIG_ROCKCHIP_MAX_INIT_SIZE	(4 << 10)
 #define CONFIG_ROCKCHIP_CHIP_TAG	"RK30"