Patchwork [v2] target-arm: implement vsli.64, vsri.64

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Submitter Christophe LYON
Date Feb. 8, 2011, 5:39 p.m.
Message ID <4D517FB6.3070106@st.com>
Download mbox | patch
Permalink /patch/82361/
State New
Headers show

Comments

Christophe LYON - Feb. 8, 2011, 5:39 p.m.
Signed-off-by: Christophe Lyon <christophe.lyon@st.com>
---
Submitted as a standalone patch as suggested by Peter, along with his corrections.

 target-arm/translate.c |   14 +++++++++++++-
 1 files changed, 13 insertions(+), 1 deletions(-)
Peter Maydell - Feb. 9, 2011, 1:55 p.m.
On 8 February 2011 17:39, Christophe Lyon <christophe.lyon@st.com> wrote:
>
> Signed-off-by: Christophe Lyon <christophe.lyon@st.com>
> ---
> Submitted as a standalone patch as suggested by Peter, along with his corrections.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

-- PMM
Aurelien Jarno - Feb. 9, 2011, 6:49 p.m.
On Wed, Feb 09, 2011 at 01:55:46PM +0000, Peter Maydell wrote:
> On 8 February 2011 17:39, Christophe Lyon <christophe.lyon@st.com> wrote:
> >
> > Signed-off-by: Christophe Lyon <christophe.lyon@st.com>
> > ---
> > Submitted as a standalone patch as suggested by Peter, along with his corrections.
> 
> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
> 

Thanks, applied.

Patch

diff --git a/target-arm/translate.c b/target-arm/translate.c
index e4649e6..b694eed 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -4688,7 +4688,19 @@  static int disas_neon_data_insn(CPUState * env, DisasContext *s, uint32_t insn)
                             tcg_gen_add_i64(cpu_V0, cpu_V0, cpu_V1);
                         } else if (op == 4 || (op == 5 && u)) {
                             /* Insert */
-                            cpu_abort(env, "VS[LR]I.64 not implemented");
+                            neon_load_reg64(cpu_V1, rd + pass);
+                            uint64_t mask;
+                            if (shift < -63 || shift > 63) {
+                                mask = 0;
+                            } else {
+                                if (op == 4) {
+                                    mask = 0xffffffffffffffffull >> -shift;
+                                } else {
+                                    mask = 0xffffffffffffffffull << shift;
+                                }
+                            }
+                            tcg_gen_andi_i64(cpu_V1, cpu_V1, ~mask);
+                            tcg_gen_or_i64(cpu_V0, cpu_V0, cpu_V1);
                         }
                         neon_store_reg64(cpu_V0, rd + pass);
                     } else { /* size < 3 */