From patchwork Mon Oct 9 20:53:37 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 823514 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3y9stc6Mk8z9t5Q for ; Tue, 10 Oct 2017 07:54:32 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755072AbdJIUyT (ORCPT ); Mon, 9 Oct 2017 16:54:19 -0400 Received: from mail.free-electrons.com ([62.4.15.54]:44578 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755071AbdJIUxn (ORCPT ); Mon, 9 Oct 2017 16:53:43 -0400 Received: by mail.free-electrons.com (Postfix, from userid 110) id D9FA72092D; Mon, 9 Oct 2017 22:53:40 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (LFbn-TOU-1-209-191.w86-201.abo.wanadoo.fr [86.201.56.191]) by mail.free-electrons.com (Postfix) with ESMTPSA id AE4C0208C1; Mon, 9 Oct 2017 22:53:40 +0200 (CEST) From: Maxime Ripard To: Chen-Yu Tsai , Maxime Ripard , linus.walleij@linaro.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org Subject: [PATCH v2 1/3] pinctrl: sunxi: Introduce the strict flag Date: Mon, 9 Oct 2017 22:53:37 +0200 Message-Id: X-Mailer: git-send-email 2.13.6 In-Reply-To: References: In-Reply-To: References: Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Our pinctrl device should have had strict set all along. However, it wasn't the case, and most of our old device trees also have a pinctrl group in addition to the GPIOs properties, which mean that we can't really turn it on now. All our new SoCs don't have that group, so we should still enable that mode on the newer one though. In order to enable it by default, add a flag that will allow to disable that mode that should be set by pinctrl drivers that cannot be migrated. Signed-off-by: Maxime Ripard --- drivers/pinctrl/sunxi/pinctrl-sunxi.c | 12 +++++++++++- drivers/pinctrl/sunxi/pinctrl-sunxi.h | 1 + 2 files changed, 12 insertions(+), 1 deletion(-) diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c index 52edf3b5988d..3bbb34435e0f 100644 --- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c +++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c @@ -1245,6 +1245,7 @@ int sunxi_pinctrl_init_with_variant(struct platform_device *pdev, struct pinctrl_desc *pctrl_desc; struct pinctrl_pin_desc *pins; struct sunxi_pinctrl *pctl; + struct pinmux_ops *pmxops; struct resource *res; int i, ret, last_pin, pin_idx; struct clk *clk; @@ -1305,7 +1306,16 @@ int sunxi_pinctrl_init_with_variant(struct platform_device *pdev, pctrl_desc->npins = pctl->ngroups; pctrl_desc->confops = &sunxi_pconf_ops; pctrl_desc->pctlops = &sunxi_pctrl_ops; - pctrl_desc->pmxops = &sunxi_pmx_ops; + + pmxops = devm_kmemdup(&pdev->dev, &sunxi_pmx_ops, sizeof(sunxi_pmx_ops), + GFP_KERNEL); + if (!pmxops) + return -ENOMEM; + + if (desc->disable_strict_mode) + pmxops->strict = false; + + pctrl_desc->pmxops = pmxops; pctl->pctl_dev = devm_pinctrl_register(&pdev->dev, pctrl_desc, pctl); if (IS_ERR(pctl->pctl_dev)) { diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.h b/drivers/pinctrl/sunxi/pinctrl-sunxi.h index 1bfc0d8a55df..11b128f54ed2 100644 --- a/drivers/pinctrl/sunxi/pinctrl-sunxi.h +++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.h @@ -112,6 +112,7 @@ struct sunxi_pinctrl_desc { unsigned irq_banks; unsigned irq_bank_base; bool irq_read_needs_mux; + bool disable_strict_mode; }; struct sunxi_pinctrl_function {