From patchwork Mon Oct 9 20:53:39 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 823513 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3y9stD6XsBz9t5Q for ; Tue, 10 Oct 2017 07:54:12 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755060AbdJIUxp (ORCPT ); Mon, 9 Oct 2017 16:53:45 -0400 Received: from mail.free-electrons.com ([62.4.15.54]:44588 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755433AbdJIUxo (ORCPT ); Mon, 9 Oct 2017 16:53:44 -0400 Received: by mail.free-electrons.com (Postfix, from userid 110) id AF7702092F; Mon, 9 Oct 2017 22:53:41 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (LFbn-TOU-1-209-191.w86-201.abo.wanadoo.fr [86.201.56.191]) by mail.free-electrons.com (Postfix) with ESMTPSA id 857A5208C1; Mon, 9 Oct 2017 22:53:41 +0200 (CEST) From: Maxime Ripard To: Chen-Yu Tsai , Maxime Ripard , linus.walleij@linaro.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org Subject: [PATCH v2 3/3] pinctrl: sunxi: Enforce the strict mode by default Date: Mon, 9 Oct 2017 22:53:39 +0200 Message-Id: X-Mailer: git-send-email 2.13.6 In-Reply-To: References: In-Reply-To: References: Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The strict mode should always have been enabled on our driver, and leaving it unchecked just makes it harder to find a migration path as time passes. Let's enable it by default now so that hopefully the new SoCs should be safe. Acked-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard --- drivers/pinctrl/sunxi/pinctrl-sunxi.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c index 3bbb34435e0f..4b6cb25bc796 100644 --- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c +++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c @@ -696,6 +696,7 @@ static const struct pinmux_ops sunxi_pmx_ops = { .get_function_groups = sunxi_pmx_get_func_groups, .set_mux = sunxi_pmx_set_mux, .gpio_set_direction = sunxi_pmx_gpio_set_direction, + .strict = true, }; static int sunxi_pinctrl_gpio_direction_input(struct gpio_chip *chip,