| Message ID | 20171008043541.48564-1-icenowy@aosc.io |
|---|---|
| State | Changes Requested, archived |
| Headers | show |
| Series | [1/2] dt-bindings: add binding for Allwinner R40 SATA AHCI controller | expand |
On Sun, Oct 08, 2017 at 04:35:40AM +0000, Icenowy Zheng wrote: > The Allwinner R40 SoC contains a SATA AHCI controller like the one in > A10/A20 SoCs, however a reset control and two power supplies are added > to it. > > Add a binding document for it. > > As a dedicated binding document is needed now for the A10/A20/R40 AHCI > controller, drop the A10 compatible line from generic platform AHCI > controller binding document. Why is it needed? Maxime
On Sun, Oct 08, 2017 at 04:35:41AM +0000, Icenowy Zheng wrote: > Allwinner R40 SoC has an AHCI SATA controller like the one in A10/A20, > but with a reset control and two dedicated VDD pins for this controller > (one 1.2v and one 2.5v). > > Add support for it. > > Signed-off-by: Icenowy Zheng <icenowy@aosc.io> > --- > drivers/ata/ahci_sunxi.c | 118 +++++++++++++++++++++++++++++++++++++++++++++-- > 1 file changed, 115 insertions(+), 3 deletions(-) > > diff --git a/drivers/ata/ahci_sunxi.c b/drivers/ata/ahci_sunxi.c > index b26437430163..a650fd6508be 100644 > --- a/drivers/ata/ahci_sunxi.c > +++ b/drivers/ata/ahci_sunxi.c > @@ -25,6 +25,7 @@ > #include <linux/of_device.h> > #include <linux/platform_device.h> > #include <linux/regulator/consumer.h> > +#include <linux/reset.h> > #include "ahci.h" > > #define DRV_NAME "ahci-sunxi" > @@ -58,6 +59,19 @@ MODULE_PARM_DESC(enable_pmp, > #define AHCI_P0PHYCR 0x0178 > #define AHCI_P0PHYSR 0x017c > > +struct ahci_sunxi_quirks { > + bool has_reset; > + bool has_vdd1v2; > + bool has_vdd2v5; > +}; > + > +struct ahci_sunxi_data { > + const struct ahci_sunxi_quirks *quirks; > + struct reset_control *reset; > + struct regulator *vdd1v2; > + struct regulator *vdd2v5; > +}; > + > static void sunxi_clrbits(void __iomem *reg, u32 clr_val) > { > u32 reg_val; > @@ -179,17 +193,69 @@ static int ahci_sunxi_probe(struct platform_device *pdev) > { > struct device *dev = &pdev->dev; > struct ahci_host_priv *hpriv; > + struct ahci_sunxi_data *data; > int rc; > > + data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); > + if (!data) > + return -ENOMEM; > + > + data->quirks = of_device_get_match_data(dev); > + if (!data->quirks) > + return -EINVAL; > + > + if (data->quirks->has_reset) { > + data->reset = devm_reset_control_get(dev, NULL); > + if (IS_ERR(data->reset)) { > + dev_err(dev, "Failed to get reset\n"); > + return PTR_ERR(data->reset); > + } > + } > + > + if (data->quirks->has_vdd1v2) { > + data->vdd1v2 = devm_regulator_get(dev, "vdd1v2"); > + if (IS_ERR(data->vdd1v2)) { > + dev_err(dev, "Failed to get 1.2v VDD regulator\n"); > + return PTR_ERR(data->vdd1v2); > + } > + } > + > + if (data->quirks->has_vdd2v5) { > + data->vdd2v5 = devm_regulator_get(dev, "vdd2v5"); > + if (IS_ERR(data->vdd2v5)) { > + dev_err(dev, "Failed to get 2.5v VDD regulator\n"); > + return PTR_ERR(data->vdd2v5); > + } > + } > + > hpriv = ahci_platform_get_resources(pdev); > if (IS_ERR(hpriv)) > return PTR_ERR(hpriv); > > + hpriv->plat_data = data; > hpriv->start_engine = ahci_sunxi_start_engine; > > + if (data->quirks->has_vdd1v2) { > + rc = regulator_enable(data->vdd1v2); > + if (rc) > + return rc; > + } > + > + if (data->quirks->has_vdd2v5) { > + rc = regulator_enable(data->vdd2v5); > + if (rc) > + goto disable_vdd1v2; > + } > + > + if (data->quirks->has_reset) { > + rc = reset_control_deassert(data->reset); > + if (rc) > + goto disable_vdd2v5; > + } > + This should all be dealt with the AHCI platform layer, just like the clocks, and well some regulators already. Maxime
On Sun, Oct 08, 2017 at 12:35:40PM +0800, Icenowy Zheng wrote: > The Allwinner R40 SoC contains a SATA AHCI controller like the one in > A10/A20 SoCs, however a reset control and two power supplies are added > to it. > > Add a binding document for it. > > As a dedicated binding document is needed now for the A10/A20/R40 AHCI > controller, drop the A10 compatible line from generic platform AHCI > controller binding document. > > Signed-off-by: Icenowy Zheng <icenowy@aosc.io> > --- > .../devicetree/bindings/ata/ahci-platform.txt | 1 - > .../bindings/ata/allwinner,sun4i-a10-ahci.txt | 40 ++++++++++++++++++++++ > 2 files changed, 40 insertions(+), 1 deletion(-) > create mode 100644 Documentation/devicetree/bindings/ata/allwinner,sun4i-a10-ahci.txt > > diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.txt b/Documentation/devicetree/bindings/ata/ahci-platform.txt > index fedc213b5f1a..da6818b2c204 100644 > --- a/Documentation/devicetree/bindings/ata/ahci-platform.txt > +++ b/Documentation/devicetree/bindings/ata/ahci-platform.txt > @@ -9,7 +9,6 @@ PHYs. > > Required properties: > - compatible : compatible string, one of: > - - "allwinner,sun4i-a10-ahci" > - "brcm,iproc-ahci" > - "hisilicon,hisi-ahci" > - "cavium,octeon-7130-ahci" > diff --git a/Documentation/devicetree/bindings/ata/allwinner,sun4i-a10-ahci.txt b/Documentation/devicetree/bindings/ata/allwinner,sun4i-a10-ahci.txt > new file mode 100644 > index 000000000000..0eea78c14ad3 > --- /dev/null > +++ b/Documentation/devicetree/bindings/ata/allwinner,sun4i-a10-ahci.txt > @@ -0,0 +1,40 @@ > +Allwinner A10/A20/R40 SoC SATA AHCI Controller > + > +Required properties: > +- compatible : compatible string, one of: > + - "allwinner,sun4i-a10-ahci" > + - "allwinner,sun8i-r40-ahci" > +- interrupts : the SATA IRQ > +- reg : the register mapping > +- clocks : the clocks needed by SATA controller, usually contains > + an AHB clock and a mod clock > + > +Optional properties: > +- target-supply : regulator for SATA target power > + > +Required properties for the following compatibles: > + - "allwinner,sun8i-r40-ahci" > +- resets : the reset control needed by SATA controller > +- vdd1v2-supply : regulator for SATA controller's 1.2V VDD > +- vdd2v5-supply : regulator for SATA controller's 2.5V VDD I have to wonder, are these really for the controller and not the phy? You don't have any phy? Rob -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.txt b/Documentation/devicetree/bindings/ata/ahci-platform.txt index fedc213b5f1a..da6818b2c204 100644 --- a/Documentation/devicetree/bindings/ata/ahci-platform.txt +++ b/Documentation/devicetree/bindings/ata/ahci-platform.txt @@ -9,7 +9,6 @@ PHYs. Required properties: - compatible : compatible string, one of: - - "allwinner,sun4i-a10-ahci" - "brcm,iproc-ahci" - "hisilicon,hisi-ahci" - "cavium,octeon-7130-ahci" diff --git a/Documentation/devicetree/bindings/ata/allwinner,sun4i-a10-ahci.txt b/Documentation/devicetree/bindings/ata/allwinner,sun4i-a10-ahci.txt new file mode 100644 index 000000000000..0eea78c14ad3 --- /dev/null +++ b/Documentation/devicetree/bindings/ata/allwinner,sun4i-a10-ahci.txt @@ -0,0 +1,40 @@ +Allwinner A10/A20/R40 SoC SATA AHCI Controller + +Required properties: +- compatible : compatible string, one of: + - "allwinner,sun4i-a10-ahci" + - "allwinner,sun8i-r40-ahci" +- interrupts : the SATA IRQ +- reg : the register mapping +- clocks : the clocks needed by SATA controller, usually contains + an AHB clock and a mod clock + +Optional properties: +- target-supply : regulator for SATA target power + +Required properties for the following compatibles: + - "allwinner,sun8i-r40-ahci" +- resets : the reset control needed by SATA controller +- vdd1v2-supply : regulator for SATA controller's 1.2V VDD +- vdd2v5-supply : regulator for SATA controller's 2.5V VDD + + +Examples for A10: + ahci: sata@1c18000 { + compatible = "allwinner,sun4i-a10-ahci"; + reg = <0x01c18000 0x1000>; + interrupts = <56>; + clocks = <&pll6 0>, <&ahb_gates 25>; + target-supply = <®_ahci_5v>; + }; + +Examples for R40: + ahci: sata@1c18000 { + compatible = "allwinner,sun8i-r40-ahci"; + reg = <0x01c18000 0x1000>; + interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_SATA>, <&ccu CLK_BUS_SATA>; + resets = <&ccu RST_BUS_SATA>; + vdd1v2-supply = <®_eldo3>; + vdd2v5-supply = <®_dldo4>; + };
The Allwinner R40 SoC contains a SATA AHCI controller like the one in A10/A20 SoCs, however a reset control and two power supplies are added to it. Add a binding document for it. As a dedicated binding document is needed now for the A10/A20/R40 AHCI controller, drop the A10 compatible line from generic platform AHCI controller binding document. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> --- .../devicetree/bindings/ata/ahci-platform.txt | 1 - .../bindings/ata/allwinner,sun4i-a10-ahci.txt | 40 ++++++++++++++++++++++ 2 files changed, 40 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/ata/allwinner,sun4i-a10-ahci.txt