@@ -555,7 +555,7 @@ static MaltaFPGAState *malta_fpga_init(MemoryRegion *address_space,
MaltaFPGAState *s;
Chardev *chr;
- s = (MaltaFPGAState *)g_malloc0(sizeof(MaltaFPGAState));
+ s = g_new0(MaltaFPGAState, 1);
memory_region_init_io(&s->iomem, NULL, &malta_fpga_ops, s,
"malta-fpga", 0x100000);
@@ -166,7 +166,7 @@ mips_mipssim_init(MachineState *machine)
cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model));
env = &cpu->env;
- reset_info = g_malloc0(sizeof(ResetData));
+ reset_info = g_new0(ResetData, 1);
reset_info->cpu = cpu;
reset_info->vector = env->active_tc.PC;
qemu_register_reset(main_cpu_reset, reset_info);
@@ -196,7 +196,7 @@ void mips_r4k_init(MachineState *machine)
cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model));
env = &cpu->env;
- reset_info = g_malloc0(sizeof(ResetData));
+ reset_info = g_new0(ResetData, 1);
reset_info->cpu = cpu;
reset_info->vector = env->active_tc.PC;
qemu_register_reset(main_cpu_reset, reset_info);
@@ -806,7 +806,7 @@ static void mmu_init (CPUMIPSState *env, const mips_def_t *def)
{
MIPSCPU *cpu = mips_env_get_cpu(env);
- env->tlb = g_malloc0(sizeof(CPUMIPSTLBContext));
+ env->tlb = g_new0(CPUMIPSTLBContext, 1);
switch (def->mmu_type) {
case MMU_TYPE_NONE:
@@ -839,7 +839,7 @@ static void fpu_init (CPUMIPSState *env, const mips_def_t *def)
static void mvp_init (CPUMIPSState *env, const mips_def_t *def)
{
- env->mvp = g_malloc0(sizeof(CPUMIPSMVPContext));
+ env->mvp = g_new0(CPUMIPSMVPContext, 1);
/* MVPConf1 implemented, TLB sharable, no gating storage support,
programmable cache partitioning implemented, number of allocatable