From patchwork Wed Oct 4 21:07:24 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Brandt X-Patchwork-Id: 821481 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3y6pRM343kz9t69 for ; Thu, 5 Oct 2017 08:08:47 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751135AbdJDVIo (ORCPT ); Wed, 4 Oct 2017 17:08:44 -0400 Received: from relmlor4.renesas.com ([210.160.252.174]:8122 "EHLO relmlie3.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1750797AbdJDVIm (ORCPT ); Wed, 4 Oct 2017 17:08:42 -0400 Received: from unknown (HELO relmlir4.idc.renesas.com) ([10.200.68.154]) by relmlie3.idc.renesas.com with ESMTP; 05 Oct 2017 06:08:41 +0900 Received: from relmlii1.idc.renesas.com (relmlii1.idc.renesas.com [10.200.68.65]) by relmlir4.idc.renesas.com (Postfix) with ESMTP id 95F17473EA; Thu, 5 Oct 2017 06:08:41 +0900 (JST) X-IronPort-AV: E=Sophos;i="5.42,478,1500908400"; d="scan'208";a="258532637" Received: from unknown (HELO rtamta01.rta.renesas.com) ([143.103.48.75]) by relmlii1.idc.renesas.com with ESMTP; 05 Oct 2017 06:08:40 +0900 Received: from localhost.localdomain (unknown [143.103.58.15]) by rtamta01.rta.renesas.com (Postfix) with ESMTP id 988511DB; Wed, 4 Oct 2017 21:08:32 +0000 (UTC) From: Chris Brandt To: Linus Walleij , Rob Herring , Mark Rutland , Geert Uytterhoeven Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Simon Horman , Jacopo Mondi , Chris Brandt Subject: [PATCH v3 2/2] dt-bindings: pinctrl: add support for RZ/A1M and RZ/A1L Date: Wed, 4 Oct 2017 16:07:24 -0500 Message-Id: <20171004210724.59797-3-chris.brandt@renesas.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20171004210724.59797-1-chris.brandt@renesas.com> References: <20171004210724.59797-1-chris.brandt@renesas.com> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Describe how to specify RZ/A1M and RZ/A1L devices. Signed-off-by: Chris Brandt Reviewed-by: Geert Uytterhoeven Acked-by: Rob Herring --- v3: * Reworded * Added Reviewed-by v2: * Added description for RZ/A1M --- Documentation/devicetree/bindings/pinctrl/renesas,rza1-pinctrl.txt | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rza1-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/renesas,rza1-pinctrl.txt index 43e21474528a..fd3696eb36bf 100644 --- a/Documentation/devicetree/bindings/pinctrl/renesas,rza1-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/renesas,rza1-pinctrl.txt @@ -12,8 +12,10 @@ Pin controller node ------------------- Required properties: - - compatible - this shall be "renesas,r7s72100-ports". + - compatible: should be: + - "renesas,r7s72100-ports": for RZ/A1H + - "renesas,r7s72101-ports", "renesas,r7s72100-ports": for RZ/A1M + - "renesas,r7s72102-ports": for RZ/A1L - reg address base and length of the memory area where the pin controller