diff mbox

[U-Boot] fsl_ddr: Adds 16 bit DDR Data width option

Message ID 1297071591-8636-1-git-send-email-poonam.aggrwal@freescale.com
State Accepted
Commit 0b3b1766b78331dfd109f2c5f816dcdd65055eb6
Delegated to: Kumar Gala
Headers show

Commit Message

poonam aggrwal Feb. 7, 2011, 9:39 a.m. UTC
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Cc: York Sun <yorksun@freescale.com>
---
P1014 processor supports maximum 16bit DDR data width.
Based of: git://git.am.freescale.net/mirrors/u-boot.git (branch, master)
 arch/powerpc/cpu/mpc8xxx/ddr/util.c      |    4 +++-
 arch/powerpc/include/asm/fsl_ddr_sdram.h |    1 +
 2 files changed, 4 insertions(+), 1 deletions(-)

Comments

Kumar Gala Feb. 10, 2011, 5:32 a.m. UTC | #1
On Feb 7, 2011, at 3:39 AM, Poonam Aggrwal wrote:

> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
> Cc: York Sun <yorksun@freescale.com>
> ---
> P1014 processor supports maximum 16bit DDR data width.
> Based of: git://git.am.freescale.net/mirrors/u-boot.git (branch, master)
> arch/powerpc/cpu/mpc8xxx/ddr/util.c      |    4 +++-
> arch/powerpc/include/asm/fsl_ddr_sdram.h |    1 +
> 2 files changed, 4 insertions(+), 1 deletions(-)

applied to 85xx next

- k
diff mbox

Patch

diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/util.c b/arch/powerpc/cpu/mpc8xxx/ddr/util.c
index 1e2d921..a137685 100644
--- a/arch/powerpc/cpu/mpc8xxx/ddr/util.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/util.c
@@ -1,5 +1,5 @@ 
 /*
- * Copyright 2008 Freescale Semiconductor, Inc.
+ * Copyright 2008-2011 Freescale Semiconductor, Inc.
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License
@@ -141,6 +141,8 @@  void board_add_ram_info(int use_default)
 
 	if (sdram_cfg & SDRAM_CFG_32_BE)
 		puts(", 32-bit");
+	else if (sdram_cfg & SDRAM_CFG_16_BE)
+		puts(", 16-bit");
 	else
 		puts(", 64-bit");
 
diff --git a/arch/powerpc/include/asm/fsl_ddr_sdram.h b/arch/powerpc/include/asm/fsl_ddr_sdram.h
index b5b1efe..99dddb4 100644
--- a/arch/powerpc/include/asm/fsl_ddr_sdram.h
+++ b/arch/powerpc/include/asm/fsl_ddr_sdram.h
@@ -84,6 +84,7 @@  typedef ddr3_spd_eeprom_t generic_spd_eeprom_t;
 #define SDRAM_CFG_SDRAM_TYPE_SHIFT	24
 #define SDRAM_CFG_DYN_PWR		0x00200000
 #define SDRAM_CFG_32_BE			0x00080000
+#define SDRAM_CFG_16_BE			0x00100000
 #define SDRAM_CFG_8_BE			0x00040000
 #define SDRAM_CFG_NCAP			0x00020000
 #define SDRAM_CFG_2T_EN			0x00008000