diff mbox series

[2/2] pinctrl: rockchip: Fix the correct routing config for the gmac-m1 pins of rmii and rgmii

Message ID 1506773601-27315-3-git-send-email-david.wu@rock-chips.com
State New
Headers show
Series Fix two pinctrl issues | expand

Commit Message

David Wu Sept. 30, 2017, 12:13 p.m. UTC
If the gmac-m1 optimization(bit10) is selected, the gpio function
of gmac pins is not valid. We may use the rmii mode for gmac interface,
the pins such as rx_d2, rx_d3, which the rgmii mode used, but rmii not
used could be taken as gpio function. So gmac_rxd0m1 selects the bit2,
and gmac_rxd0m3 select bit10 is more correct.

Signed-off-by: David Wu <david.wu@rock-chips.com>
---
 drivers/pinctrl/pinctrl-rockchip.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

Comments

Heiko Stübner Sept. 30, 2017, 3:07 p.m. UTC | #1
Hi David,

Am Samstag, 30. September 2017, 20:13:21 CEST schrieb David Wu:
> If the gmac-m1 optimization(bit10) is selected, the gpio function
> of gmac pins is not valid. We may use the rmii mode for gmac interface,
> the pins such as rx_d2, rx_d3, which the rgmii mode used, but rmii not
> used could be taken as gpio function. So gmac_rxd0m1 selects the bit2,
> and gmac_rxd0m3 select bit10 is more correct.
> 
> Signed-off-by: David Wu <david.wu@rock-chips.com>

the patch subject should mention the the rk3328 whose routing gets fixed
(like adding a simple "on rk3328" to it), otherwise

Reviewed-by: Heiko Stuebner <heiko@sntech.de>
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Linus Walleij Oct. 7, 2017, 10:32 a.m. UTC | #2
On Sat, Sep 30, 2017 at 5:07 PM, Heiko Stuebner <heiko@sntech.de> wrote:
> Am Samstag, 30. September 2017, 20:13:21 CEST schrieb David Wu:
>> If the gmac-m1 optimization(bit10) is selected, the gpio function
>> of gmac pins is not valid. We may use the rmii mode for gmac interface,
>> the pins such as rx_d2, rx_d3, which the rgmii mode used, but rmii not
>> used could be taken as gpio function. So gmac_rxd0m1 selects the bit2,
>> and gmac_rxd0m3 select bit10 is more correct.
>>
>> Signed-off-by: David Wu <david.wu@rock-chips.com>
>
> the patch subject should mention the the rk3328 whose routing gets fixed
> (like adding a simple "on rk3328" to it), otherwise
>
> Reviewed-by: Heiko Stuebner <heiko@sntech.de>

I added rk3328 to it, also assumed this Reviewed-by covers patch 1/2
as well and applied both with your tag.

Yours,
Linus Walleij
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Heiko Stübner Oct. 7, 2017, 6:50 p.m. UTC | #3
Hi Linus,

Am Samstag, 7. Oktober 2017, 12:32:51 CEST schrieb Linus Walleij:
> On Sat, Sep 30, 2017 at 5:07 PM, Heiko Stuebner <heiko@sntech.de> wrote:
> > Am Samstag, 30. September 2017, 20:13:21 CEST schrieb David Wu:
> >> If the gmac-m1 optimization(bit10) is selected, the gpio function
> >> of gmac pins is not valid. We may use the rmii mode for gmac interface,
> >> the pins such as rx_d2, rx_d3, which the rgmii mode used, but rmii not
> >> used could be taken as gpio function. So gmac_rxd0m1 selects the bit2,
> >> and gmac_rxd0m3 select bit10 is more correct.
> >>
> >> Signed-off-by: David Wu <david.wu@rock-chips.com>
> >
> > the patch subject should mention the the rk3328 whose routing gets fixed
> > (like adding a simple "on rk3328" to it), otherwise
> >
> > Reviewed-by: Heiko Stuebner <heiko@sntech.de>
> 
> I added rk3328 to it, also assumed this Reviewed-by covers patch 1/2
> as well and applied both with your tag.

while I did mean to cross-check patch 1/2 separately with the soc manual,
I got sidetracked with my current vacation :-) . Anyway, it did look ok on
first glance then and I also cannot find issues with it now. So all is good.


Heiko
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David Wu Oct. 9, 2017, 1:21 a.m. UTC | #4
Hi Linus,

Thanks for you adding it.
I left the office for a few days due to holiday.

在 2017/10/7 18:32, Linus Walleij 写道:
> On Sat, Sep 30, 2017 at 5:07 PM, Heiko Stuebner <heiko@sntech.de> wrote:
>> Am Samstag, 30. September 2017, 20:13:21 CEST schrieb David Wu:
>>> If the gmac-m1 optimization(bit10) is selected, the gpio function
>>> of gmac pins is not valid. We may use the rmii mode for gmac interface,
>>> the pins such as rx_d2, rx_d3, which the rgmii mode used, but rmii not
>>> used could be taken as gpio function. So gmac_rxd0m1 selects the bit2,
>>> and gmac_rxd0m3 select bit10 is more correct.
>>>
>>> Signed-off-by: David Wu <david.wu@rock-chips.com>
>>
>> the patch subject should mention the the rk3328 whose routing gets fixed
>> (like adding a simple "on rk3328" to it), otherwise
>>
>> Reviewed-by: Heiko Stuebner <heiko@sntech.de>
> 
> I added rk3328 to it, also assumed this Reviewed-by covers patch 1/2
> as well and applied both with your tag.
> 
> Yours,
> Linus Walleij
> 
> 
> 

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diff mbox series

Patch

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index c7c9beb..9e0cabf 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -900,12 +900,19 @@  static void rockchip_get_recalced_mux(struct rockchip_pin_bank *bank, int pin,
 		.route_offset = 0x50,
 		.route_val = BIT(16) | BIT(16 + 1) | BIT(0),
 	}, {
-		/* gmac-m1-optimized_rxd0 */
+		/* gmac-m1_rxd0 */
 		.bank_num = 1,
 		.pin = 11,
 		.func = 2,
 		.route_offset = 0x50,
-		.route_val = BIT(16 + 2) | BIT(16 + 10) | BIT(2) | BIT(10),
+		.route_val = BIT(16 + 2) | BIT(2),
+	}, {
+		/* gmac-m1-optimized_rxd3 */
+		.bank_num = 1,
+		.pin = 14,
+		.func = 2,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 10) | BIT(10),
 	}, {
 		/* pdm_sdi0m0 */
 		.bank_num = 2,