Message ID | 1e28c7c0-3cec-8419-876f-cbfe41fdfd39@redhat.com |
---|---|
State | New |
Headers | show |
Series | patch to fix PR81481 | expand |
Vladimir Makarov <vmakarov@redhat.com> writes: > The following patch fixes > > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81481 > > The patch was bootstrapped and tested on x86-64. > > Committed as rev. 253300. > > > Index: ira-costs.c > =================================================================== > --- ira-costs.c (revision 253253) > +++ ira-costs.c (working copy) > @@ -1471,7 +1471,10 @@ scan_one_insn (rtx_insn *insn) > && targetm.legitimate_constant_p (GET_MODE (SET_DEST (set)), > XEXP (note, 0)) > && REG_N_SETS (REGNO (SET_DEST (set))) == 1)) > - && general_operand (SET_SRC (set), GET_MODE (SET_SRC (set)))) > + && general_operand (SET_SRC (set), GET_MODE (SET_SRC (set))) > + /* LRA does not use equiv with a symbol for PIC code. */ > + && (! ira_use_lra_p || ! pic_offset_table_rtx > + || ! contains_symbol_ref_p (XEXP (note, 0)))) > { > enum reg_class cl = GENERAL_REGS; > rtx reg = SET_DEST (set); I don't think this is the right test for PICness. Most targets have an unconditional pic_offset_table_rtx. Richard
On 09/30/2017 04:15 AM, Richard Sandiford wrote: > Vladimir Makarov <vmakarov@redhat.com> writes: >> The following patch fixes >> >> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81481 >> >> The patch was bootstrapped and tested on x86-64. >> >> Committed as rev. 253300. >> >> >> Index: ira-costs.c >> =================================================================== >> --- ira-costs.c (revision 253253) >> +++ ira-costs.c (working copy) >> @@ -1471,7 +1471,10 @@ scan_one_insn (rtx_insn *insn) >> && targetm.legitimate_constant_p (GET_MODE (SET_DEST (set)), >> XEXP (note, 0)) >> && REG_N_SETS (REGNO (SET_DEST (set))) == 1)) >> - && general_operand (SET_SRC (set), GET_MODE (SET_SRC (set)))) >> + && general_operand (SET_SRC (set), GET_MODE (SET_SRC (set))) >> + /* LRA does not use equiv with a symbol for PIC code. */ >> + && (! ira_use_lra_p || ! pic_offset_table_rtx >> + || ! contains_symbol_ref_p (XEXP (note, 0)))) >> { >> enum reg_class cl = GENERAL_REGS; >> rtx reg = SET_DEST (set); > I don't think this is the right test for PICness. Most targets have > an unconditional pic_offset_table_rtx. > Thank you, Richard, for checking the patch. Yes, the test might be not right for PICness. The actual patch goal was to sync IRA and LRA which uses the same code to analyze when an equiv can be used. So if we need less conservative code, we should change the code in the both places.
Index: ira-costs.c =================================================================== --- ira-costs.c (revision 253253) +++ ira-costs.c (working copy) @@ -1471,7 +1471,10 @@ scan_one_insn (rtx_insn *insn) && targetm.legitimate_constant_p (GET_MODE (SET_DEST (set)), XEXP (note, 0)) && REG_N_SETS (REGNO (SET_DEST (set))) == 1)) - && general_operand (SET_SRC (set), GET_MODE (SET_SRC (set)))) + && general_operand (SET_SRC (set), GET_MODE (SET_SRC (set))) + /* LRA does not use equiv with a symbol for PIC code. */ + && (! ira_use_lra_p || ! pic_offset_table_rtx + || ! contains_symbol_ref_p (XEXP (note, 0)))) { enum reg_class cl = GENERAL_REGS; rtx reg = SET_DEST (set); bash-4.3$ svn diff --diff-cmd diff -x -up ChangeLog testsuite/ChangeLog ira-costs.c testsuite/gcc.target/i386/pr81481.c Index: ChangeLog =================================================================== --- ChangeLog (revision 253299) +++ ChangeLog (working copy) @@ -1,5 +1,11 @@ 2017-09-29 Vladimir Makarov <vmakarov@redhat.com> + PR target/81481 + * ira-costs.c (scan_one_insn): Don't take into account PIC equiv + with a symbol for LRA. + +2017-09-29 Vladimir Makarov <vmakarov@redhat.com> + PR rtl-optimization/82338 * lra-constraints.c (inherit_in_ebb): Check usage_insns check. Index: testsuite/ChangeLog =================================================================== --- testsuite/ChangeLog (revision 253299) +++ testsuite/ChangeLog (working copy) @@ -1,3 +1,8 @@ +2017-09-29 Vladimir Makarov <vmakarov@redhat.com> + + PR target/81481 + * gcc.target/i386/pr81481.c: New. + 2017-09-29 Kelvin Nilsen <kelvin@gcc.gnu.org> * gcc.target/powerpc/swaps-p8-30.c: Exchange the order of dg-do Index: ira-costs.c =================================================================== --- ira-costs.c (revision 253253) +++ ira-costs.c (working copy) @@ -1471,7 +1471,10 @@ scan_one_insn (rtx_insn *insn) && targetm.legitimate_constant_p (GET_MODE (SET_DEST (set)), XEXP (note, 0)) && REG_N_SETS (REGNO (SET_DEST (set))) == 1)) - && general_operand (SET_SRC (set), GET_MODE (SET_SRC (set)))) + && general_operand (SET_SRC (set), GET_MODE (SET_SRC (set))) + /* LRA does not use equiv with a symbol for PIC code. */ + && (! ira_use_lra_p || ! pic_offset_table_rtx + || ! contains_symbol_ref_p (XEXP (note, 0)))) { enum reg_class cl = GENERAL_REGS; rtx reg = SET_DEST (set); Index: testsuite/gcc.target/i386/pr81481.c =================================================================== --- testsuite/gcc.target/i386/pr81481.c (nonexistent) +++ testsuite/gcc.target/i386/pr81481.c (working copy) @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target ssse3 } */ +/* { dg-options "-O2 -fpic -mssse3" } */ +/* { dg-final { scan-assembler-not "pshufb\[ \t\]\\(%esp\\)" } } */ +#include <immintrin.h> + +extern const signed char c[31] __attribute__((visibility("hidden"))); + +__m128i f(__m128i *x, void *v) +{ + int i; + asm("# %0" : "=r"(i)); + __m128i t = _mm_loadu_si128((void*)&c[i]); + __m128i xx = *x; + xx = _mm_shuffle_epi8(xx, t); + asm("# %0 %1 %2" : "+x"(xx) : "r"(c), "r"(i)); + return xx; +}