Patchwork [ia64,committed] Fix vector instructions on IA64 HP-UX

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Submitter Steve Ellcey
Date Feb. 4, 2011, 10:01 p.m.
Message ID <1296856913.12233.1353.camel@hpsje.cup.hp.com>
Download mbox | patch
Permalink /patch/81957/
State New
Headers show

Comments

Steve Ellcey - Feb. 4, 2011, 10:01 p.m.
On Fri, 2011-02-04 at 09:58 -0800, Richard Henderson wrote:
> On 02/04/2011 09:37 AM, Steve Ellcey wrote:
> 
> > I wanted to see if you had any comments before I check it in.
> 
> It's definitely an improvement...
> 
> 
> r~

Richard,

I checked in the previous patch and this patch fixes the problems I was
having with vec_extract_evenv2sf and vec_extract_oddv2sf.  Once I have
verified this patch with a complete test run I will check it in.  This
should give us clean runs of the gcc.dg/vect suite and enable everything
on HP-UX that is working on Linux.

Steve Ellcey
sje@cup.hp.com

2011-02-04  Steve Ellcey  <sje@cup.hp.com>

        PR target/46997
        * vect.md (vec_interleave_highv2sf): Change fmix for TARGET_BIG_ENDIAN.
        (vec_interleave_lowv2sf): Ditto.
        (vec_extract_evenv2sf): Add TARGET_BIG_ENDIAN check.
        (vec_extract_oddv2sf): Ditto.

   [(match_operand:V2SF 0 "gr_register_operand" "")
    (match_operand:V2SF 1 "gr_register_operand" "")
    (match_operand:V2SF 2 "gr_register_operand" "")]
-  "!TARGET_BIG_ENDIAN"
+  ""
 {
-  emit_insn (gen_vec_interleave_highv2sf (operands[0], operands[1],
-                                         operands[2]));
+  if (TARGET_BIG_ENDIAN)
+    emit_insn (gen_vec_interleave_lowv2sf (operands[0], operands[1],
+                                          operands[2]));
+  else
+    emit_insn (gen_vec_interleave_highv2sf (operands[0], operands[1],
+                                           operands[2]));
   DONE;
 })

Patch

Index: config/ia64/vect.md
===================================================================
--- config/ia64/vect.md (revision 169840)
+++ config/ia64/vect.md (working copy)
@@ -1490,7 +1490,7 @@ 
 {
   /* Recall that vector elements are numbered in memory order.  */
   if (TARGET_BIG_ENDIAN)
-    return "%,fmix.r %0 = %F1, %F2";
+    return "%,fmix.l %0 = %F1, %F2";
   else
     return "%,fmix.l %0 = %F2, %F1";
 }
@@ -1507,7 +1507,7 @@ 
 {
   /* Recall that vector elements are numbered in memory order.  */
   if (TARGET_BIG_ENDIAN)
-    return "%,fmix.l %0 = %F1, %F2";
+    return "%,fmix.r %0 = %F1, %F2";
   else
     return "%,fmix.r %0 = %F2, %F1";
 }
@@ -1534,10 +1534,14 @@ 
   [(match_operand:V2SF 0 "gr_register_operand" "")
    (match_operand:V2SF 1 "gr_register_operand" "")
    (match_operand:V2SF 2 "gr_register_operand" "")]
-  "!TARGET_BIG_ENDIAN"
+  ""
 {
-  emit_insn (gen_vec_interleave_lowv2sf (operands[0], operands[1],
-                                        operands[2]));
+  if (TARGET_BIG_ENDIAN)
+    emit_insn (gen_vec_interleave_highv2sf (operands[0], operands[1],
+                                           operands[2]));
+  else
+    emit_insn (gen_vec_interleave_lowv2sf (operands[0], operands[1],
+                                          operands[2]));
   DONE;
 })
 @@ -1545,10 +1549,14 @@