Patchwork [22/23] x86: Fix MCA broadcast parameters for TCG case

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Submitter Marcelo Tosatti
Date Feb. 4, 2011, 3:47 p.m.
Message ID <545055b9481efad39a1207823a6954bceafe480b.1296834446.git.mtosatti@redhat.com>
Download mbox | patch
Permalink /patch/81908/
State New
Headers show

Comments

Marcelo Tosatti - Feb. 4, 2011, 3:47 p.m.
From: Jan Kiszka <jan.kiszka@web.de>

When broadcasting MCEs, we need to set MCIP and RIPV in mcg_status like
it is done for KVM. Use the symbolic constants at this chance.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
---
 target-i386/helper.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)
Aurelien Jarno - Feb. 8, 2011, 11:39 a.m.
On Fri, Feb 04, 2011 at 01:47:25PM -0200, Marcelo Tosatti wrote:
> From: Jan Kiszka <jan.kiszka@web.de>
> 
> When broadcasting MCEs, we need to set MCIP and RIPV in mcg_status like
> it is done for KVM. Use the symbolic constants at this chance.
> 
> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
> ---
>  target-i386/helper.c |    4 ++--
>  1 files changed, 2 insertions(+), 2 deletions(-)

I don't feel very comfortable about this whole series (not in my
knowledge area), but as nobody else seems to care about 32-bit support,
I have committed this patch to master and the stable-0.14 tree.

> diff --git a/target-i386/helper.c b/target-i386/helper.c
> index 1217452..f0c546d 100644
> --- a/target-i386/helper.c
> +++ b/target-i386/helper.c
> @@ -1147,8 +1147,8 @@ void cpu_inject_x86_mce(CPUState *cenv, int bank, uint64_t status,
>                  if (cenv == env) {
>                      continue;
>                  }
> -
> -                qemu_inject_x86_mce(env, 1, 0xa000000000000000, 0, 0, 0);
> +                qemu_inject_x86_mce(env, 1, MCI_STATUS_VAL | MCI_STATUS_UC,
> +                                    MCG_STATUS_MCIP | MCG_STATUS_RIPV, 0, 0);
>              }
>          }
>      }
> -- 
> 1.7.2.3
> 
> 
>
Jan Kiszka - Feb. 8, 2011, 11:42 a.m.
On 2011-02-08 12:39, Aurelien Jarno wrote:
> On Fri, Feb 04, 2011 at 01:47:25PM -0200, Marcelo Tosatti wrote:
>> From: Jan Kiszka <jan.kiszka@web.de>
>>
>> When broadcasting MCEs, we need to set MCIP and RIPV in mcg_status like
>> it is done for KVM. Use the symbolic constants at this chance.
>>
>> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
>> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
>> ---
>>  target-i386/helper.c |    4 ++--
>>  1 files changed, 2 insertions(+), 2 deletions(-)
> 
> I don't feel very comfortable about this whole series (not in my
> knowledge area), but as nobody else seems to care about 32-bit support,
> I have committed this patch to master and the stable-0.14 tree.

Don't worry too much. MCE support in QEMU, emulated or virtualized, is
still fairly "experimental", not much to break here. And this is truly a
fix.

Thanks!
Jan

> 
>> diff --git a/target-i386/helper.c b/target-i386/helper.c
>> index 1217452..f0c546d 100644
>> --- a/target-i386/helper.c
>> +++ b/target-i386/helper.c
>> @@ -1147,8 +1147,8 @@ void cpu_inject_x86_mce(CPUState *cenv, int bank, uint64_t status,
>>                  if (cenv == env) {
>>                      continue;
>>                  }
>> -
>> -                qemu_inject_x86_mce(env, 1, 0xa000000000000000, 0, 0, 0);
>> +                qemu_inject_x86_mce(env, 1, MCI_STATUS_VAL | MCI_STATUS_UC,
>> +                                    MCG_STATUS_MCIP | MCG_STATUS_RIPV, 0, 0);
>>              }
>>          }
>>      }
>> -- 
>> 1.7.2.3
>>
>>
>>
>

Patch

diff --git a/target-i386/helper.c b/target-i386/helper.c
index 1217452..f0c546d 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -1147,8 +1147,8 @@  void cpu_inject_x86_mce(CPUState *cenv, int bank, uint64_t status,
                 if (cenv == env) {
                     continue;
                 }
-
-                qemu_inject_x86_mce(env, 1, 0xa000000000000000, 0, 0, 0);
+                qemu_inject_x86_mce(env, 1, MCI_STATUS_VAL | MCI_STATUS_UC,
+                                    MCG_STATUS_MCIP | MCG_STATUS_RIPV, 0, 0);
             }
         }
     }