From patchwork Mon Sep 25 22:15:43 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 818361 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="f/9yjFmZ"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3y1JSr1K0bz9s7G for ; Tue, 26 Sep 2017 08:21:00 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S964879AbdIYWUo (ORCPT ); Mon, 25 Sep 2017 18:20:44 -0400 Received: from mail-wr0-f195.google.com ([209.85.128.195]:37267 "EHLO mail-wr0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S936030AbdIYWUc (ORCPT ); Mon, 25 Sep 2017 18:20:32 -0400 Received: by mail-wr0-f195.google.com with SMTP id u48so813924wrf.4; Mon, 25 Sep 2017 15:20:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=oSlzcAXD2oZguab5EdTGlvguEC+AOB4JNJkHKLjlgxg=; b=f/9yjFmZ7cxXe3yszJ/LSPCHGpU5jQ12xeQTROrK0pDeUQGu3uGeS3U97nz7WiBFUa SW54d/qqdQyIkml1DmvYhkMmXydoxhK/gUhbg41tTIb/EjnEXggjVUZ9cOnRXL3SyYca 052jWceTBQytG5dvo/lyUPoG7v7vfaQ8HYXA4Dzj5+zYMw9E6/NIINJoLtsjjCcjenon ODncYnWkPhqGCnZ88C6NTUuVex5P54h9i/To8dgwjy0U8C2ydmviNUV+42BwCwKWXj08 GUzPtm24ue4OpG19PKLvo0XLEBQ0uDQhllpz2IUOhJAJ5KP6dLMJgBAqvbTuH/GKKv1H TeCg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=oSlzcAXD2oZguab5EdTGlvguEC+AOB4JNJkHKLjlgxg=; b=J1xyT5JFPu3oqyQuLHMKBoDOiEXxGqUVJR3TcN+f90AhR7jA3GwQcYn2y+ixq1Oan2 NTcWVQrzGq1Yvi8xtqe2ooIzRGuZhAk/Z0YXqHN+rUW5nwQv9c6iMDj2qo6p8tlPm+PN n+qbo08uibkpZP1gz+g1OLZTWWneac+U/GN+22rk5i06p+hN3KyiR4EvUohDJGNU9AxO A9rdnUbUWsEjRKGuNVwT4SNR/BGAUyHYoKEXNbES7fN5s9+Vaf76FlEbhtarB+klizCE UKaXofJpG8sxFGoz9cowiD4d4gC8OyBwJbskeULzYxwLrzWt81mTmass3oavyps0d8vq ghFg== X-Gm-Message-State: AHPjjUgydnKZV09O1uQc297q3ERMJMUAcWq7m8ICwUDkksieaZb1gDJi 4s50zqs1pSchvfdpMNcsroU= X-Google-Smtp-Source: AOwi7QCgR4j7xDcacDvVSMP6qc3ydQd1xIBoV7VQRUCsrmHifZJsARWIdzDJT8rPSeGZtdIdCeUf5Q== X-Received: by 10.25.104.22 with SMTP id d22mr2894579lfc.41.1506378030225; Mon, 25 Sep 2017 15:20:30 -0700 (PDT) Received: from localhost.localdomain (ppp109-252-90-109.pppoe.spdop.ru. [109.252.90.109]) by smtp.gmail.com with ESMTPSA id e2sm1146241lff.61.2017.09.25.15.20.28 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 25 Sep 2017 15:20:29 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Greg Kroah-Hartman , Rob Herring Cc: linux-tegra@vger.kernel.org, devel@driverdev.osuosl.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 2/2] ARM: dts: tegra20: Add video decoder node Date: Tue, 26 Sep 2017 01:15:43 +0300 Message-Id: X-Mailer: git-send-email 2.14.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Add a device node for the video decoder engine found on Tegra20. Signed-off-by: Dmitry Osipenko --- arch/arm/boot/dts/tegra20.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index 7c85f97f72ea..fb485a5e63d7 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -249,6 +249,22 @@ */ }; + vde@6001a000 { + compatible = "nvidia,tegra20-vde"; + reg = <0x6001a000 0x3D00 /* VDE registers */ + 0x40000400 0x3FC00>; /* IRAM area */ + reg-names = "regs", "iram"; + interrupts = , /* UCQ error interrupt */ + , /* Sync token interrupt */ + , /* BSE-V interrupt */ + , /* BSE-A interrupt */ + ; /* SXE interrupt */ + interrupt-names = "ucq-error", "sync-token", "bsev", "bsea", "sxe"; + clocks = <&tegra_car TEGRA20_CLK_VDE>; + resets = <&tegra_car 61>; + reset-names = "vde"; + }; + apbmisc@70000800 { compatible = "nvidia,tegra20-apbmisc"; reg = <0x70000800 0x64 /* Chip revision */